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https://github.com/N64Recomp/N64Recomp.git
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Code cleanup
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parent
443c3859e4
commit
7449fad4bb
3 changed files with 39 additions and 29 deletions
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@ -9,6 +9,7 @@
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#include <unordered_map>
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#include <unordered_set>
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#include <filesystem>
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#include <optional>
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#ifdef _MSC_VER
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inline uint32_t byteswap(uint32_t val) {
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@ -86,7 +87,7 @@ namespace N64Recomp {
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bool executable = false;
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bool relocatable = false; // TODO is this needed? relocs being non-empty should be an equivalent check.
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bool has_mips32_relocs = false;
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uint32_t gp_ram_addr = 0;
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std::optional<uint32_t> gp_ram_addr = std::nullopt;
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};
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struct ReferenceSection {
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@ -16,8 +16,7 @@ struct RegState {
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uint32_t prev_addiu_vram;
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uint32_t prev_addu_vram;
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uint8_t prev_addend_reg;
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// offset of lw rt,offset(gp)
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uint32_t prev_got_offset;
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uint32_t prev_got_offset; // offset of lw rt,offset(gp)
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bool valid_lui;
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bool valid_addiu;
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bool valid_addend;
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@ -28,7 +27,7 @@ struct RegState {
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uint32_t loaded_address;
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uint8_t loaded_addend_reg;
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bool valid_loaded;
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bool valid_gp_loaded;
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bool valid_got_loaded; // valid load through the GOT
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RegState() = default;
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@ -50,7 +49,7 @@ struct RegState {
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loaded_addend_reg = 0;
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valid_loaded = false;
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valid_gp_loaded = false;
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valid_got_loaded = false;
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}
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};
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@ -58,7 +57,7 @@ using InstrId = rabbitizer::InstrId::UniqueId;
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using RegId = rabbitizer::Registers::Cpu::GprO32;
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bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const N64Recomp::Function& func, N64Recomp::FunctionStats& stats,
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RegState reg_states[32], std::vector<RegState>& stack_states) {
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RegState reg_states[32], std::vector<RegState>& stack_states, bool is_gp_reg_defined) {
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// Temporary register state for tracking the register being operated on
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RegState temp{};
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@ -117,7 +116,7 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const N64Recom
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temp.prev_addend_reg = addend_reg;
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temp.prev_addu_vram = instr.getVram();
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} else if (reg_states[rs].valid_got_offset != reg_states[rt].valid_got_offset) {
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// Track which of the two registers has the valid got offset state and which is the addend
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// Track which of the two registers has the valid GOT offset state and which is the addend
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int valid_got_offset_reg = reg_states[rs].valid_got_offset ? rs : rt;
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int addend_reg = reg_states[rs].valid_got_offset ? rt : rs;
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@ -127,11 +126,11 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const N64Recom
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temp.prev_addend_reg = addend_reg;
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temp.prev_addu_vram = instr.getVram();
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} else if (((rs == (int)RegId::GPR_O32_gp) || (rt == (int)RegId::GPR_O32_gp))
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&& reg_states[rs].valid_gp_loaded != reg_states[rt].valid_gp_loaded) {
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// `addu rd, rs, $gp` or `addu rd, $gp, rt` after valid $gp load, this is the last part of a $gp relative
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&& reg_states[rs].valid_got_loaded != reg_states[rt].valid_got_loaded) {
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// `addu rd, rs, $gp` or `addu rd, $gp, rt` after valid GOT load, this is the last part of a position independent
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// jump table call. Keep the register state intact.
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int valid_gp_loaded_reg = reg_states[rs].valid_gp_loaded ? rs : rt;
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int gp_reg = reg_states[rs].valid_gp_loaded ? rt : rs;
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int valid_gp_loaded_reg = reg_states[rs].valid_got_loaded ? rs : rt;
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int gp_reg = reg_states[rs].valid_got_loaded ? rt : rs;
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temp = reg_states[valid_gp_loaded_reg];
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} else {
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@ -203,16 +202,23 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const N64Recom
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temp.loaded_addu_vram = reg_states[base].prev_addu_vram;
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}
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}
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// If the base register has a valid GOT offset and a valid addend before this, then this may be a load from a $gp relative jump table
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// If the base register has a valid GOT offset and a valid addend before this, then this may be a load from a position independent jump table
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else if (reg_states[base].valid_got_offset && reg_states[base].valid_addend) {
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temp.valid_gp_loaded = true;
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// At this point, we will have the offset from the value of the previously read GOT entry to the address being
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// loaded here as well as the GOT entry offset itself
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temp.valid_got_loaded = true;
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temp.loaded_lw_vram = instr.getVram();
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temp.loaded_address = imm; // This address is relative for now, we'll calculate the absolute address later
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temp.loaded_addend_reg = reg_states[base].prev_addend_reg;
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temp.loaded_addu_vram = reg_states[base].prev_addu_vram;
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temp.prev_got_offset = reg_states[base].prev_got_offset;
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} else if (base == (int)RegId::GPR_O32_gp) {
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// lw from the $gp register implies a read from the GOT
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// lw from the $gp register implies a read from the global offset table
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if (!is_gp_reg_defined) {
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fmt::print(stderr, "Found $gp register usage in section without a defined $gp value at 0x{:08X} in {}\n",
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instr.getVram(), func.name);
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return false;
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}
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temp.prev_got_offset = imm;
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temp.valid_got_offset = true;
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}
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@ -235,7 +241,7 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const N64Recom
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std::nullopt,
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std::vector<uint32_t>{}
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);
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} else if (reg_states[rs].valid_gp_loaded) {
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} else if (reg_states[rs].valid_got_loaded) {
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stats.jump_tables.emplace_back(
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reg_states[rs].loaded_address,
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reg_states[rs].loaded_addend_reg,
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@ -274,6 +280,9 @@ bool analyze_instruction(const rabbitizer::InstructionCpu& instr, const N64Recom
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bool N64Recomp::analyze_function(const N64Recomp::Context& context, const N64Recomp::Function& func,
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const std::vector<rabbitizer::InstructionCpu>& instructions, N64Recomp::FunctionStats& stats) {
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const Section* section = &context.sections[func.section_index];
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std::optional<uint32_t> gp_ram_addr = section->gp_ram_addr;
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// Create a state to track each register (r0 won't be used)
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RegState reg_states[32] {};
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std::vector<RegState> stack_states{};
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@ -281,23 +290,23 @@ bool N64Recomp::analyze_function(const N64Recomp::Context& context, const N64Rec
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// Look for jump tables
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// A linear search through the func won't be accurate due to not taking control flow into account, but it'll work for finding jtables
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for (const auto& instr : instructions) {
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if (!analyze_instruction(instr, func, stats, reg_states, stack_states)) {
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if (!analyze_instruction(instr, func, stats, reg_states, stack_states, gp_ram_addr.has_value())) {
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return false;
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}
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}
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const Section* section = &context.sections[func.section_index];
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// Calculate absolute addresses for position-independent jump tables
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if (gp_ram_addr.has_value()) {
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uint32_t gp_rom_addr = gp_ram_addr.value() + func.rom - func.vram;
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// Calculate absolute addresses for jump tables that are relative to $gp
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for (size_t i = 0; i < stats.jump_tables.size(); i++) {
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JumpTable& cur_jtbl = stats.jump_tables[i];
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for (size_t i = 0; i < stats.jump_tables.size(); i++) {
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JumpTable& cur_jtbl = stats.jump_tables[i];
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if (cur_jtbl.got_offset.has_value()) {
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uint32_t gp_ram_addr = section->gp_ram_addr;
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uint32_t gp_rom_addr = gp_ram_addr + func.rom - func.vram;
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uint32_t got_word = byteswap(*reinterpret_cast<const uint32_t*>(&context.rom[gp_rom_addr + cur_jtbl.got_offset.value()]));
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if (cur_jtbl.got_offset.has_value()) {
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uint32_t got_word = byteswap(*reinterpret_cast<const uint32_t*>(&context.rom[gp_rom_addr + cur_jtbl.got_offset.value()]));
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cur_jtbl.vram += section->ram_addr + got_word;
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cur_jtbl.vram += (section->ram_addr + got_word);
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}
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}
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}
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@ -328,10 +337,10 @@ bool N64Recomp::analyze_function(const N64Recomp::Context& context, const N64Rec
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uint32_t rom_addr = vram + func.rom - func.vram;
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uint32_t jtbl_word = byteswap(*reinterpret_cast<const uint32_t*>(&context.rom[rom_addr]));
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if (cur_jtbl.got_offset.has_value()) {
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// $gp relative jump tables have values that are offsets from $gp,
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if (cur_jtbl.got_offset.has_value() && gp_ram_addr.has_value()) {
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// Position independent jump tables have values that are offsets from $gp,
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// convert those to absolute addresses
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jtbl_word += section->gp_ram_addr;
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jtbl_word += gp_ram_addr.value();
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}
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// Check if the entry is a valid address in the current function
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@ -489,7 +489,7 @@ bool N64Recomp::Context::from_symbol_file(const std::filesystem::path& symbol_fi
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section.ram_addr = vram_addr.value();
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section.size = size.value();
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section.name = name.value();
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section.gp_ram_addr = gp_ram_addr.value_or(0);
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section.gp_ram_addr = gp_ram_addr;
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section.executable = true;
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// Read functions for the section.
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