Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
* Update SoftFloat.cs * Update SoftFallback.cs * Update InstEmitSimdShift.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CryptoHelper.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuThreadState.cs * Update OpCodeTable.cs * Add files via upload * Nit. * Remove unused using. Nit. * Remove unused using. FZ update. * Nit. * Remove unused using.
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LDj3SNuD
gdkchan
parent
53e6664526
commit
1e7ea76f14
28 changed files with 5843 additions and 5639 deletions
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@ -1,14 +1,12 @@
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#define SimdIns
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using ChocolArm64.State;
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using NUnit.Framework;
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using System.Runtime.Intrinsics;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("SimdIns")] // Tested: second half of 2018.
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[Category("SimdIns")]
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public sealed class CpuTestSimdIns : CpuTest
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{
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#if SimdIns
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@ -54,125 +52,125 @@ namespace Ryujinx.Tests.Cpu
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private const int RndCnt = 2;
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[Test, Pairwise, Description("DUP <Vd>.<T>, <R><n>")]
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public void Dup_Gp_W([Values(0u)] uint Rd,
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[Values(1u, 31u)] uint Rn,
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[ValueSource("_W_")] [Random(RndCnt)] uint Wn,
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[Values(0, 1, 2)] int Size, // Q0: <8B, 4H, 2S>
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[Values(0b0u, 0b1u)] uint Q) // Q1: <16B, 8H, 4S>
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public void Dup_Gp_W([Values(0u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[ValueSource("_W_")] [Random(RndCnt)] uint wn,
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[Values(0, 1, 2)] int size, // Q0: <8B, 4H, 2S>
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[Values(0b0u, 0b1u)] uint q) // Q1: <16B, 8H, 4S>
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{
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uint Imm5 = (1u << Size) & 0x1Fu;
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uint imm5 = (1u << size) & 0x1Fu;
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uint Opcode = 0x0E000C00; // RESERVED
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcode |= (Imm5 << 16);
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Opcode |= ((Q & 1) << 30);
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uint opcode = 0x0E000C00; // RESERVED
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm5 << 16);
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opcode |= ((q & 1) << 30);
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ulong Z = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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ulong z = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, V0: V0);
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SingleOpcode(opcode, x1: wn, v0: v0);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("DUP <Vd>.<T>, <R><n>")]
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public void Dup_Gp_X([Values(0u)] uint Rd,
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[Values(1u, 31u)] uint Rn,
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[ValueSource("_X_")] [Random(RndCnt)] ulong Xn)
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public void Dup_Gp_X([Values(0u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[ValueSource("_X_")] [Random(RndCnt)] ulong xn)
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{
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uint Opcode = 0x4E080C00; // DUP V0.2D, X0
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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uint opcode = 0x4E080C00; // DUP V0.2D, X0
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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ulong Z = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> V0 = MakeVectorE0E1(Z, Z);
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ulong z = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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CpuThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, V0: V0);
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SingleOpcode(opcode, x1: xn, v0: v0);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("SMOV <Wd>, <Vn>.<Ts>[<index>]")]
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public void Smov_S_W([Values(0u, 31u)] uint Rd,
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[Values(1u)] uint Rn,
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[ValueSource("_8B4H_")] [Random(RndCnt)] ulong A,
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[Values(0, 1)] int Size, // <B, H>
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[Values(0u, 1u, 2u, 3u)] uint Index)
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public void Smov_S_W([Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_8B4H_")] [Random(RndCnt)] ulong a,
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[Values(0, 1)] int size, // <B, H>
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[Values(0u, 1u, 2u, 3u)] uint index)
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{
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uint Imm5 = (Index << (Size + 1) | 1u << Size) & 0x1Fu;
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uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
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uint Opcode = 0x0E002C00; // RESERVED
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcode |= (Imm5 << 16);
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uint opcode = 0x0E002C00; // RESERVED
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm5 << 16);
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ulong _X0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
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uint _W31 = TestContext.CurrentContext.Random.NextUInt();
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Vector128<float> V1 = MakeVectorE0(A);
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ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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Vector128<float> v1 = MakeVectorE0(a);
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CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _X0, X31: _W31, V1: V1);
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SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("SMOV <Xd>, <Vn>.<Ts>[<index>]")]
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public void Smov_S_X([Values(0u, 31u)] uint Rd,
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[Values(1u)] uint Rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
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[Values(0, 1, 2)] int Size, // <B, H, S>
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[Values(0u, 1u)] uint Index)
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public void Smov_S_X([Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[Values(0, 1, 2)] int size, // <B, H, S>
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[Values(0u, 1u)] uint index)
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{
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uint Imm5 = (Index << (Size + 1) | 1u << Size) & 0x1Fu;
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uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
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uint Opcode = 0x4E002C00; // RESERVED
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcode |= (Imm5 << 16);
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uint opcode = 0x4E002C00; // RESERVED
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm5 << 16);
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ulong _X31 = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> V1 = MakeVectorE0(A);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> v1 = MakeVectorE0(a);
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CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _X31, V1: V1);
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SingleOpcode(opcode, x31: x31, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("UMOV <Wd>, <Vn>.<Ts>[<index>]")]
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public void Umov_S_W([Values(0u, 31u)] uint Rd,
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[Values(1u)] uint Rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong A,
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[Values(0, 1, 2)] int Size, // <B, H, S>
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[Values(0u, 1u)] uint Index)
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public void Umov_S_W([Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
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[Values(0, 1, 2)] int size, // <B, H, S>
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[Values(0u, 1u)] uint index)
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{
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uint Imm5 = (Index << (Size + 1) | 1u << Size) & 0x1Fu;
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uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
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uint Opcode = 0x0E003C00; // RESERVED
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcode |= (Imm5 << 16);
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uint opcode = 0x0E003C00; // RESERVED
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm5 << 16);
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ulong _X0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
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uint _W31 = TestContext.CurrentContext.Random.NextUInt();
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Vector128<float> V1 = MakeVectorE0(A);
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ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
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uint w31 = TestContext.CurrentContext.Random.NextUInt();
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Vector128<float> v1 = MakeVectorE0(a);
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CpuThreadState ThreadState = SingleOpcode(Opcode, X0: _X0, X31: _W31, V1: V1);
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SingleOpcode(opcode, x0: x0, x31: w31, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("UMOV <Xd>, <Vn>.<Ts>[<index>]")]
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public void Umov_S_X([Values(0u, 31u)] uint Rd,
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[Values(1u)] uint Rn,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong A,
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[Values(3)] int Size, // <D>
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[Values(0u)] uint Index)
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public void Umov_S_X([Values(0u, 31u)] uint rd,
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[Values(1u)] uint rn,
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[ValueSource("_1D_")] [Random(RndCnt)] ulong a,
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[Values(3)] int size, // <D>
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[Values(0u)] uint index)
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{
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uint Imm5 = (Index << (Size + 1) | 1u << Size) & 0x1Fu;
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uint imm5 = (index << (size + 1) | 1u << size) & 0x1Fu;
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uint Opcode = 0x4E003C00; // RESERVED
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Opcode |= ((Rn & 31) << 5) | ((Rd & 31) << 0);
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Opcode |= (Imm5 << 16);
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uint opcode = 0x4E003C00; // RESERVED
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opcode |= ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm5 << 16);
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ulong _X31 = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> V1 = MakeVectorE0(A);
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ulong x31 = TestContext.CurrentContext.Random.NextULong();
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Vector128<float> v1 = MakeVectorE0(a);
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CpuThreadState ThreadState = SingleOpcode(Opcode, X31: _X31, V1: V1);
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SingleOpcode(opcode, x31: x31, v1: v1);
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CompareAgainstUnicorn();
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}
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