Implement CAL and RET shader instructions (#1618)
* Add support for CAL and RET shader instructions * Remove unused stuff * Fix a bug that could cause the wrong values to be passed to a function * Avoid repopulating function id dictionary every time * PR feedback * Fix vertex shader A/B merge
This commit is contained in:
gdkchan
GitHub
parent
973a615d40
commit
49f970d5bd
33 changed files with 1337 additions and 401 deletions
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@ -14,6 +14,16 @@ namespace Ryujinx.Graphics.Shader.Translation
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{
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private const int HeaderSize = 0x50;
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private struct FunctionCode
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{
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public Operation[] Code { get; }
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public FunctionCode(Operation[] code)
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{
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Code = code;
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}
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}
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public static ShaderProgram Translate(ulong address, IGpuAccessor gpuAccessor, TranslationFlags flags)
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{
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return Translate(DecodeShader(address, gpuAccessor, flags, out ShaderConfig config), config);
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@ -21,32 +31,65 @@ namespace Ryujinx.Graphics.Shader.Translation
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public static ShaderProgram Translate(ulong addressA, ulong addressB, IGpuAccessor gpuAccessor, TranslationFlags flags)
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{
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Operation[] opsA = DecodeShader(addressA, gpuAccessor, flags | TranslationFlags.VertexA, out ShaderConfig configA);
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Operation[] opsB = DecodeShader(addressB, gpuAccessor, flags, out ShaderConfig config);
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FunctionCode[] funcA = DecodeShader(addressA, gpuAccessor, flags | TranslationFlags.VertexA, out ShaderConfig configA);
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FunctionCode[] funcB = DecodeShader(addressB, gpuAccessor, flags, out ShaderConfig config);
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config.SetUsedFeature(configA.UsedFeatures);
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return Translate(Combine(opsA, opsB), config, configA.Size);
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return Translate(Combine(funcA, funcB), config, configA.Size);
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}
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private static ShaderProgram Translate(Operation[] ops, ShaderConfig config, int sizeA = 0)
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private static ShaderProgram Translate(FunctionCode[] functions, ShaderConfig config, int sizeA = 0)
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{
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BasicBlock[] blocks = ControlFlowGraph.MakeCfg(ops);
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var cfgs = new ControlFlowGraph[functions.Length];
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var frus = new RegisterUsage.FunctionRegisterUsage[functions.Length];
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if (blocks.Length > 0)
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for (int i = 0; i < functions.Length; i++)
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{
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Dominance.FindDominators(blocks[0], blocks.Length);
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cfgs[i] = ControlFlowGraph.Create(functions[i].Code);
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Dominance.FindDominanceFrontiers(blocks);
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Ssa.Rename(blocks);
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Optimizer.RunPass(blocks, config);
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Lowering.RunPass(blocks, config);
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if (i != 0)
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{
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frus[i] = RegisterUsage.RunPass(cfgs[i]);
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}
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}
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StructuredProgramInfo sInfo = StructuredProgram.MakeStructuredProgram(blocks, config);
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Function[] funcs = new Function[functions.Length];
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for (int i = 0; i < functions.Length; i++)
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{
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var cfg = cfgs[i];
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int inArgumentsCount = 0;
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int outArgumentsCount = 0;
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if (i != 0)
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{
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var fru = frus[i];
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inArgumentsCount = fru.InArguments.Length;
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outArgumentsCount = fru.OutArguments.Length;
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}
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if (cfg.Blocks.Length != 0)
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{
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RegisterUsage.FixupCalls(cfg.Blocks, frus);
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Dominance.FindDominators(cfg);
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Dominance.FindDominanceFrontiers(cfg.Blocks);
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Ssa.Rename(cfg.Blocks);
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Optimizer.RunPass(cfg.Blocks, config);
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Lowering.RunPass(cfg.Blocks, config);
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}
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funcs[i] = new Function(cfg.Blocks, $"fun{i}", false, inArgumentsCount, outArgumentsCount);
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}
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StructuredProgramInfo sInfo = StructuredProgram.MakeStructuredProgram(funcs, config);
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GlslProgram program = GlslGenerator.Generate(sInfo, config);
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@ -62,9 +105,9 @@ namespace Ryujinx.Graphics.Shader.Translation
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return new ShaderProgram(spInfo, config.Stage, glslCode, config.Size, sizeA);
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}
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private static Operation[] DecodeShader(ulong address, IGpuAccessor gpuAccessor, TranslationFlags flags, out ShaderConfig config)
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private static FunctionCode[] DecodeShader(ulong address, IGpuAccessor gpuAccessor, TranslationFlags flags, out ShaderConfig config)
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{
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Block[] cfg;
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Block[][] cfg;
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if ((flags & TranslationFlags.Compute) != 0)
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{
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@ -83,112 +126,131 @@ namespace Ryujinx.Graphics.Shader.Translation
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{
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gpuAccessor.Log("Invalid branch detected, failed to build CFG.");
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return Array.Empty<Operation>();
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return Array.Empty<FunctionCode>();
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}
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EmitterContext context = new EmitterContext(config);
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Dictionary<ulong, int> funcIds = new Dictionary<ulong, int>();
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for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
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{
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funcIds.Add(cfg[funcIndex][0].Address, funcIndex);
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}
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List<FunctionCode> funcs = new List<FunctionCode>();
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ulong maxEndAddress = 0;
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for (int blkIndex = 0; blkIndex < cfg.Length; blkIndex++)
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for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
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{
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Block block = cfg[blkIndex];
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EmitterContext context = new EmitterContext(config, funcIndex != 0, funcIds);
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if (maxEndAddress < block.EndAddress)
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for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
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{
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maxEndAddress = block.EndAddress;
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Block block = cfg[funcIndex][blkIndex];
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if (maxEndAddress < block.EndAddress)
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{
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maxEndAddress = block.EndAddress;
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}
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context.CurrBlock = block;
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context.MarkLabel(context.GetLabel(block.Address));
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EmitOps(context, block);
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}
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context.CurrBlock = block;
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context.MarkLabel(context.GetLabel(block.Address));
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for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
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{
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OpCode op = block.OpCodes[opIndex];
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if ((flags & TranslationFlags.DebugMode) != 0)
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{
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string instName;
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if (op.Emitter != null)
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{
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instName = op.Emitter.Method.Name;
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}
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else
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{
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instName = "???";
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gpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
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}
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string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
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context.Add(new CommentNode(dbgComment));
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}
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if (op.NeverExecute)
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{
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continue;
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}
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Operand predSkipLbl = null;
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bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
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if (op is OpCodeBranchPop opBranchPop)
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{
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// If the instruction is a SYNC or BRK instruction with only one
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// possible target address, then the instruction is basically
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// just a simple branch, we can generate code similar to branch
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// instructions, with the condition check on the branch itself.
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skipPredicateCheck = opBranchPop.Targets.Count < 2;
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}
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if (!(op.Predicate.IsPT || skipPredicateCheck))
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{
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Operand label;
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if (opIndex == block.OpCodes.Count - 1 && block.Next != null)
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{
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label = context.GetLabel(block.Next.Address);
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}
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else
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{
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label = Label();
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predSkipLbl = label;
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}
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Operand pred = Register(op.Predicate);
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if (op.InvertPredicate)
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{
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context.BranchIfTrue(label, pred);
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}
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else
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{
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context.BranchIfFalse(label, pred);
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}
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}
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context.CurrOp = op;
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op.Emitter?.Invoke(context);
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if (predSkipLbl != null)
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{
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context.MarkLabel(predSkipLbl);
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}
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}
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funcs.Add(new FunctionCode(context.GetOperations()));
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}
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config.SizeAdd((int)maxEndAddress + (flags.HasFlag(TranslationFlags.Compute) ? 0 : HeaderSize));
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return context.GetOperations();
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return funcs.ToArray();
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}
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private static Operation[] Combine(Operation[] a, Operation[] b)
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internal static void EmitOps(EmitterContext context, Block block)
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{
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for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
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{
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OpCode op = block.OpCodes[opIndex];
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if ((context.Config.Flags & TranslationFlags.DebugMode) != 0)
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{
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string instName;
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if (op.Emitter != null)
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{
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instName = op.Emitter.Method.Name;
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}
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else
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{
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instName = "???";
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context.Config.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
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}
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string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
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context.Add(new CommentNode(dbgComment));
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}
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if (op.NeverExecute)
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{
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continue;
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}
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Operand predSkipLbl = null;
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bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
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if (op is OpCodeBranchPop opBranchPop)
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{
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// If the instruction is a SYNC or BRK instruction with only one
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// possible target address, then the instruction is basically
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// just a simple branch, we can generate code similar to branch
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// instructions, with the condition check on the branch itself.
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skipPredicateCheck = opBranchPop.Targets.Count < 2;
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}
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if (!(op.Predicate.IsPT || skipPredicateCheck))
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{
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Operand label;
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if (opIndex == block.OpCodes.Count - 1 && block.Next != null)
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{
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label = context.GetLabel(block.Next.Address);
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}
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else
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{
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label = Label();
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predSkipLbl = label;
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}
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Operand pred = Register(op.Predicate);
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if (op.InvertPredicate)
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{
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context.BranchIfTrue(label, pred);
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}
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else
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{
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context.BranchIfFalse(label, pred);
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}
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}
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context.CurrOp = op;
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op.Emitter?.Invoke(context);
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if (predSkipLbl != null)
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{
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context.MarkLabel(predSkipLbl);
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}
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}
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}
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private static FunctionCode[] Combine(FunctionCode[] a, FunctionCode[] b)
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{
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// Here we combine two shaders.
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// For shader A:
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@ -199,15 +261,17 @@ namespace Ryujinx.Graphics.Shader.Translation
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// For shader B:
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// - All user attribute loads on shader B are turned into copies from a
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// temporary variable, as long that attribute is written by shader A.
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List<Operation> output = new List<Operation>(a.Length + b.Length);
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FunctionCode[] output = new FunctionCode[a.Length + b.Length - 1];
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List<Operation> ops = new List<Operation>(a.Length + b.Length);
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Operand[] temps = new Operand[AttributeConsts.UserAttributesCount * 4];
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Operand lblB = Label();
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for (int index = 0; index < a.Length; index++)
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for (int index = 0; index < a[0].Code.Length; index++)
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{
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Operation operation = a[index];
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Operation operation = a[0].Code[index];
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if (IsUserAttribute(operation.Dest))
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{
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@ -227,19 +291,19 @@ namespace Ryujinx.Graphics.Shader.Translation
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if (operation.Inst == Instruction.Return)
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{
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output.Add(new Operation(Instruction.Branch, lblB));
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ops.Add(new Operation(Instruction.Branch, lblB));
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}
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else
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{
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output.Add(operation);
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ops.Add(operation);
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}
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}
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output.Add(new Operation(Instruction.MarkLabel, lblB));
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ops.Add(new Operation(Instruction.MarkLabel, lblB));
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for (int index = 0; index < b.Length; index++)
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for (int index = 0; index < b[0].Code.Length; index++)
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{
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Operation operation = b[index];
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Operation operation = b[0].Code[index];
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for (int srcIndex = 0; srcIndex < operation.SourcesCount; srcIndex++)
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{
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@ -256,10 +320,22 @@ namespace Ryujinx.Graphics.Shader.Translation
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}
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}
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output.Add(operation);
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ops.Add(operation);
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}
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return output.ToArray();
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output[0] = new FunctionCode(ops.ToArray());
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for (int i = 1; i < a.Length; i++)
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{
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output[i] = a[i];
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}
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for (int i = 1; i < b.Length; i++)
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{
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output[a.Length + i - 1] = b[i];
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}
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return output;
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}
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private static bool IsUserAttribute(Operand operand)
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