Add MUL (vector by element), fix FCVTN, make svcs use MakeError too
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17 changed files with 180 additions and 80 deletions
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@ -8,15 +8,27 @@ namespace ChocolArm64.Decoder
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public AOpCodeSimdRegElem(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
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{
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if ((Size & 1) != 0)
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switch (Size)
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{
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Index = (OpCode >> 11) & 1;
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}
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else
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{
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Index = (OpCode >> 21) & 1 |
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(OpCode >> 10) & 2;
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case 1:
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Index = (OpCode >> 21) & 1 |
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(OpCode >> 10) & 2 |
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(OpCode >> 18) & 4;
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Rm &= 0xf;
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break;
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case 2:
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Index = (OpCode >> 21) & 1 |
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(OpCode >> 10) & 2;
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break;
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default: Emitter = AInstEmit.Und; return;
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}
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}
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}
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}
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