Add Fmls_Se, Fmulx_Se/Ve, Smov_S Inst.; Opt. Clz/Clz_V, Cnt_V, Shl_V, S/Ushr_V, S/Usra_V Inst.; Add 11 Tests. Some fixes. (#449)
* Update AOpCodeTable.cs * Update AInstEmitSimdMove.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdShift.cs * Update ASoftFallback.cs * Update ASoftFloat.cs * Update AOpCodeSimdRegElemF.cs * Update CpuTestSimdIns.cs * Update CpuTestSimdRegElem.cs * Create CpuTestSimdRegElemF.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Superseded Fmul_Se Test. Nit. * Address PR feedback. * Address PR feedback. * Update AInstEmitSimdArithmetic.cs * Update ASoftFallback.cs * Update AInstEmitAlu.cs * Update AInstEmitSimdShift.cs
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14 changed files with 938 additions and 228 deletions
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@ -386,7 +386,7 @@ namespace ChocolArm64.Instruction
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#endregion
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#region "Count"
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public static ulong CountLeadingSigns(ulong Value, int Size)
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public static ulong CountLeadingSigns(ulong Value, int Size) // Size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
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{
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Value ^= Value >> 1;
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@ -405,9 +405,9 @@ namespace ChocolArm64.Instruction
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private static readonly byte[] ClzNibbleTbl = { 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 };
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public static ulong CountLeadingZeros(ulong Value, int Size)
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public static ulong CountLeadingZeros(ulong Value, int Size) // Size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
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{
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if (Value == 0)
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if (Value == 0ul)
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{
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return (ulong)Size;
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}
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@ -426,12 +426,17 @@ namespace ChocolArm64.Instruction
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return (ulong)Count;
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}
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public static uint CountSetBits8(uint Value)
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public static ulong CountSetBits8(ulong Value) // "Size" is 8 (SIMD&FP Inst.).
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{
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Value = ((Value >> 1) & 0x55) + (Value & 0x55);
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Value = ((Value >> 2) & 0x33) + (Value & 0x33);
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if (Value == 0xfful)
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{
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return 8ul;
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}
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return (Value >> 4) + (Value & 0x0f);
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Value = ((Value >> 1) & 0x55ul) + (Value & 0x55ul);
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Value = ((Value >> 2) & 0x33ul) + (Value & 0x33ul);
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return (Value >> 4) + (Value & 0x0ful);
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}
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#endregion
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