Mirrors/Ryujinx
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Implement PLD and SUB (imm16) on T32, plus UADD8, SADD8, USUB8 and SSUB8 on both A32 and T32 (#3693)

Browse source
This commit is contained in:
gdkchan 2022-09-13 19:51:40 -03:00 • committed by GitHub
parent e05bf90af6
commit 8e119a1e96
No known key found for this signature in database
GPG key ID: 4AEE18F83AFDEB23
6 changed files with 168 additions and 41 deletions
Download patch file Download diff file Expand all files Collapse all files

5
ARMeilleure/Instructions/InstName.cs
View file

@ -81,6 +81,7 @@ namespace ARMeilleure.Instructions
Sbcs,
Sbfm,
Sdiv,
Sel,
Shsub8,
Smaddl,
Smsubl,
@ -519,6 +520,7 @@ namespace ARMeilleure.Instructions
Revsh,
Rsb,
Rsc,
Sadd8,
Sbfx,
Shadd8,
Smla__,
@ -529,6 +531,7 @@ namespace ARMeilleure.Instructions
Smmls,
Smul__,
Smmul,
Ssub8,
Stl,
Stlb,
Stlex,
@ -550,6 +553,7 @@ namespace ARMeilleure.Instructions
Teq,
Trap,
Tst,
Uadd8,
Ubfx,
Uhadd8,
Uhsub8,
@ -558,6 +562,7 @@ namespace ARMeilleure.Instructions
Umull,
Usat,
Usat16,
Usub8,
Uxtb,
Uxtb16,
Uxth,