Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303)
* Add Vmvn (register), tests for both Vmvn variants. * Add Vpmin, Vpmax, improve Non-FastFp accuracy for Vpadd * Rebase on top of PTC. * Add Nopcode * Increment PTC version. * Fix nits.
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7 changed files with 243 additions and 23 deletions
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@ -39,8 +39,8 @@ namespace Ryujinx.Tests.Cpu
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0b1110_1
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};
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uint opcode = 0xf2800010u; // VMOV.I32 D0, #0
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uint cmodeOp = variants[variant];
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if (q)
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@ -49,11 +49,11 @@ namespace Ryujinx.Tests.Cpu
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}
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opcode |= ((cmodeOp & 1) << 5) | ((cmodeOp & 0x1e) << 7);
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opcode |= ((q ? 1u : 0u) << 6);
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opcode |= (q ? 1u : 0u) << 6;
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opcode |= (imm & 0xf) | ((imm & 0x70) << 12) | ((imm & 0x80) << 16);
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opcode |= ((vd & 0x10) << 18);
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opcode |= ((vd & 0xf) << 12);
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opcode |= (vd & 0x10) << 18;
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opcode |= (vd & 0xf) << 12;
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SingleOpcode(opcode);
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@ -258,6 +258,82 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("VMVN.<size> <Vt>, <Vm>")]
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public void Vmvn([Range(0u, 1u, 2u)] uint size,
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[Values(0u, 1u, 2u, 3u)] uint vd,
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[Values(0u, 2u, 4u, 8u)] uint vm,
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[Values] bool q)
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{
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uint opcode = 0xf3b00580u; // VMVN D0, D0
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if (q)
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{
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opcode |= 1 << 6;
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vm <<= 1;
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vd <<= 1;
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}
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opcode |= (size & 0x3) << 18;
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opcode |= (vm & 0x10) << 1;
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opcode |= (vm & 0xf) << 0;
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opcode |= (vd & 0x10) << 18;
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opcode |= (vd & 0xf) << 12;
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V128 v0 = new V128(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
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V128 v1 = new V128(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
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V128 v2 = new V128(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
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V128 v3 = new V128(TestContext.CurrentContext.Random.NextULong(), TestContext.CurrentContext.Random.NextULong());
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SingleOpcode(opcode, v0: v0, v1: v1, v2: v2, v3: v3);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("VMVN.I<size> <Dd/Qd>, #<imm>")]
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public void Mvni_V([Range(0u, 7u)] uint variant,
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[Values(0u, 1u, 2u, 3u)] uint vd,
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[Values(0x0u)] [Random(1u, 0xffu, RndCntImm)] uint imm,
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[Values] bool q)
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{
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uint[] variants =
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{
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// I32
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0b0000,
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0b0010,
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0b0100,
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0b0110,
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// I16
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0b1000,
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0b1010,
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// I32
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0b1100,
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0b1101,
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};
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uint opcode = 0xf2800030u; // VMVN.I32 D0, #0
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uint cmodeOp = variants[variant];
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if (q)
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{
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vd <<= 1;
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}
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opcode |= (cmodeOp & 0xf) << 8;
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opcode |= (q ? 1u : 0u) << 6;
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opcode |= (imm & 0xf) | ((imm & 0x70) << 12) | ((imm & 0x80) << 16);
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opcode |= (vd & 0x10) << 18;
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opcode |= (vd & 0xf) << 12;
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SingleOpcode(opcode);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("VTRN.<size> <Vd>, <Vm>")]
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public void Vtrn([Values(0u, 1u, 2u, 3u)] uint vm,
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[Values(0u, 1u, 2u, 3u)] uint vd,
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