Initial Apple Hypervisor based CPU emulation (#4332)
* Initial Apple Hypervisor based CPU emulation implementation * Add UseHypervisor Setting * Add basic MacOS support to Avalonia * Fix initialization * Fix GTK build * Fix/silence warnings * Change exceptions to asserts on HvAddressSpaceRange * Replace DllImport with LibraryImport * Fix LibraryImport * Remove unneeded usings * Revert outdated change * Set DiskCacheLoadState when using hypervisor too * Fix HvExecutionContext PC value * Address PR feedback * Use existing entitlements.xml file on distribution folder --------- Co-authored-by: riperiperi <rhy3756547@hotmail.com>
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33 changed files with 2939 additions and 45 deletions
284
Ryujinx.Cpu/AppleHv/HvExecutionContext.cs
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284
Ryujinx.Cpu/AppleHv/HvExecutionContext.cs
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using ARMeilleure.State;
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using Ryujinx.Cpu.AppleHv.Arm;
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using Ryujinx.Memory.Tracking;
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using System;
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namespace Ryujinx.Cpu.AppleHv
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{
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class HvExecutionContext : IExecutionContext
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{
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/// <inheritdoc/>
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public ulong Pc => _impl.ElrEl1;
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/// <inheritdoc/>
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public long TpidrEl0
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{
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get => _impl.TpidrEl0;
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set => _impl.TpidrEl0 = value;
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}
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/// <inheritdoc/>
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public long TpidrroEl0
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{
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get => _impl.TpidrroEl0;
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set => _impl.TpidrroEl0 = value;
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}
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/// <inheritdoc/>
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public uint Pstate
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{
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get => _impl.Pstate;
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set => _impl.Pstate = value;
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}
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/// <inheritdoc/>
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public uint Fpcr
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{
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get => _impl.Fpcr;
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set => _impl.Fpcr = value;
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}
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/// <inheritdoc/>
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public uint Fpsr
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{
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get => _impl.Fpsr;
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set => _impl.Fpsr = value;
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}
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/// <inheritdoc/>
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public bool IsAarch32
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{
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get => false;
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set
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{
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if (value)
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{
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throw new NotSupportedException();
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}
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}
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}
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/// <inheritdoc/>
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public bool Running { get; private set; }
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private readonly ICounter _counter;
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private readonly IHvExecutionContext _shadowContext;
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private IHvExecutionContext _impl;
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private readonly ExceptionCallbacks _exceptionCallbacks;
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public HvExecutionContext(ICounter counter, ExceptionCallbacks exceptionCallbacks)
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{
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_counter = counter;
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_shadowContext = new HvExecutionContextShadow();
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_impl = _shadowContext;
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_exceptionCallbacks = exceptionCallbacks;
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Running = true;
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}
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/// <inheritdoc/>
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public ulong GetX(int index) => _impl.GetX(index);
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/// <inheritdoc/>
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public void SetX(int index, ulong value) => _impl.SetX(index, value);
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/// <inheritdoc/>
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public V128 GetV(int index) => _impl.GetV(index);
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/// <inheritdoc/>
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public void SetV(int index, V128 value) => _impl.SetV(index, value);
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private void InterruptHandler()
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{
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_exceptionCallbacks.InterruptCallback?.Invoke(this);
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}
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private void BreakHandler(ulong address, int imm)
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{
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_exceptionCallbacks.BreakCallback?.Invoke(this, address, imm);
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}
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private void SupervisorCallHandler(ulong address, int imm)
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{
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_exceptionCallbacks.SupervisorCallback?.Invoke(this, address, imm);
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}
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private void UndefinedHandler(ulong address, int opCode)
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{
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_exceptionCallbacks.UndefinedCallback?.Invoke(this, address, opCode);
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}
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/// <inheritdoc/>
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public void RequestInterrupt()
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{
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_impl.RequestInterrupt();
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}
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/// <inheritdoc/>
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public void StopRunning()
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{
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Running = false;
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RequestInterrupt();
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}
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public unsafe void Execute(HvMemoryManager memoryManager, ulong address)
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{
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HvVcpu vcpu = HvVcpuPool.Instance.Create(memoryManager.AddressSpace, _shadowContext, SwapContext);
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HvApi.hv_vcpu_set_reg(vcpu.Handle, hv_reg_t.HV_REG_PC, address).ThrowOnError();
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while (Running)
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{
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HvApi.hv_vcpu_run(vcpu.Handle).ThrowOnError();
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uint reason = vcpu.ExitInfo->reason;
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if (reason == 1)
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{
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uint hvEsr = (uint)vcpu.ExitInfo->exception.syndrome;
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ExceptionClass hvEc = (ExceptionClass)(hvEsr >> 26);
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if (hvEc != ExceptionClass.HvcAarch64)
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{
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throw new Exception($"Unhandled exception from guest kernel with ESR 0x{hvEsr:X} ({hvEc}).");
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}
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address = SynchronousException(memoryManager, ref vcpu);
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HvApi.hv_vcpu_set_reg(vcpu.Handle, hv_reg_t.HV_REG_PC, address).ThrowOnError();
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}
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else if (reason == 0)
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{
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if (_impl.GetAndClearInterruptRequested())
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{
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ReturnToPool(vcpu);
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InterruptHandler();
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vcpu = RentFromPool(memoryManager.AddressSpace, vcpu);
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}
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}
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else
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{
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throw new Exception($"Unhandled exit reason {reason}.");
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}
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}
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HvVcpuPool.Instance.Destroy(vcpu, SwapContext);
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}
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private ulong SynchronousException(HvMemoryManager memoryManager, ref HvVcpu vcpu)
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{
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ulong vcpuHandle = vcpu.Handle;
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HvApi.hv_vcpu_get_sys_reg(vcpuHandle, hv_sys_reg_t.HV_SYS_REG_ELR_EL1, out ulong elr).ThrowOnError();
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HvApi.hv_vcpu_get_sys_reg(vcpuHandle, hv_sys_reg_t.HV_SYS_REG_ESR_EL1, out ulong esr).ThrowOnError();
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ExceptionClass ec = (ExceptionClass)((uint)esr >> 26);
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switch (ec)
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{
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case ExceptionClass.DataAbortLowerEl:
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DataAbort(memoryManager.Tracking, vcpuHandle, (uint)esr);
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break;
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case ExceptionClass.TrappedMsrMrsSystem:
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InstructionTrap((uint)esr);
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HvApi.hv_vcpu_set_sys_reg(vcpuHandle, hv_sys_reg_t.HV_SYS_REG_ELR_EL1, elr + 4UL).ThrowOnError();
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break;
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case ExceptionClass.SvcAarch64:
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ReturnToPool(vcpu);
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ushort id = (ushort)esr;
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SupervisorCallHandler(elr - 4UL, id);
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vcpu = RentFromPool(memoryManager.AddressSpace, vcpu);
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break;
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default:
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throw new Exception($"Unhandled guest exception {ec}.");
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}
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// Make sure we will continue running at EL0.
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if (memoryManager.AddressSpace.GetAndClearUserTlbInvalidationPending())
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{
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// TODO: Invalidate only the range that was modified?
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return HvAddressSpace.KernelRegionTlbiEretAddress;
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}
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else
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{
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return HvAddressSpace.KernelRegionEretAddress;
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}
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}
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private void DataAbort(MemoryTracking tracking, ulong vcpu, uint esr)
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{
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bool write = (esr & (1u << 6)) != 0;
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bool farValid = (esr & (1u << 10)) == 0;
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int accessSizeLog2 = (int)((esr >> 22) & 3);
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if (farValid)
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{
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HvApi.hv_vcpu_get_sys_reg(vcpu, hv_sys_reg_t.HV_SYS_REG_FAR_EL1, out ulong far).ThrowOnError();
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ulong size = 1UL << accessSizeLog2;
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if (!tracking.VirtualMemoryEvent(far, size, write))
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{
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string rw = write ? "write" : "read";
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throw new Exception($"Unhandled invalid memory access at VA 0x{far:X} with size 0x{size:X} ({rw}).");
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}
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}
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else
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{
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throw new Exception($"Unhandled invalid memory access at unknown VA with ESR 0x{esr:X}.");
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}
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}
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private void InstructionTrap(uint esr)
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{
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bool read = (esr & 1) != 0;
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uint rt = (esr >> 5) & 0x1f;
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if (read)
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{
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// Op0 Op2 Op1 CRn 00000 CRm
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switch ((esr >> 1) & 0x1ffe0f)
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{
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case 0b11_000_011_1110_00000_0000: // CNTFRQ_EL0
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WriteRt(rt, _counter.Frequency);
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break;
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case 0b11_001_011_1110_00000_0000: // CNTPCT_EL0
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WriteRt(rt, _counter.Counter);
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break;
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default:
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throw new Exception($"Unhandled system register read with ESR 0x{esr:X}");
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}
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}
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else
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{
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throw new Exception($"Unhandled system register write with ESR 0x{esr:X}");
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}
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}
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private void WriteRt(uint rt, ulong value)
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{
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if (rt < 31)
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{
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SetX((int)rt, value);
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}
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}
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private void ReturnToPool(HvVcpu vcpu)
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{
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HvVcpuPool.Instance.Return(vcpu, SwapContext);
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}
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private HvVcpu RentFromPool(HvAddressSpace addressSpace, HvVcpu vcpu)
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{
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return HvVcpuPool.Instance.Rent(addressSpace, _shadowContext, vcpu, SwapContext);
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}
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private void SwapContext(IHvExecutionContext newContext)
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{
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_impl = newContext;
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}
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public void Dispose()
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{
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}
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}
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}
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