Rewrite shader decoding stage (#2698)
* Rewrite shader decoding stage * Fix P2R constant buffer encoding * Fix PSET/PSETP * PR feedback * Log unimplemented shader instructions * Implement NOP * Remove using * PR feedback
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gdkchan
GitHub
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168 changed files with 12022 additions and 6388 deletions
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@ -2,6 +2,7 @@ using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.Translation;
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using System;
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using System.Runtime.CompilerServices;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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@ -29,184 +30,101 @@ namespace Ryujinx.Graphics.Shader.Instructions
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return Register(3, RegisterType.Flag);
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}
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public static Operand GetDest(EmitterContext context)
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public static Operand GetDest(int rd)
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{
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return Register(((IOpCodeRd)context.CurrOp).Rd);
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return Register(rd, RegisterType.Gpr);
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}
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public static Operand GetDest2(EmitterContext context)
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public static Operand GetDest2(int rd)
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{
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Register rd = ((IOpCodeRd)context.CurrOp).Rd;
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return Register(rd.Index | 1, rd.Type);
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return Register(rd | 1, RegisterType.Gpr);
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}
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public static Operand GetSrcA(EmitterContext context, bool isFP64 = false)
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{
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IOpCodeRa op = (IOpCodeRa)context.CurrOp;
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if (isFP64)
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{
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return context.PackDouble2x32(Register(op.Ra.Index, op.Ra.Type), Register(op.Ra.Index | 1, op.Ra.Type));
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}
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else
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{
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return Register(op.Ra);
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}
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}
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public static Operand GetSrcB(EmitterContext context, FPType floatType)
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{
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if (floatType == FPType.FP32)
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{
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return GetSrcB(context);
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}
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else if (floatType == FPType.FP16)
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{
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int h = context.CurrOp.RawOpCode.Extract(41, 1);
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return GetHalfUnpacked(context, GetSrcB(context), FPHalfSwizzle.FP16)[h];
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}
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else if (floatType == FPType.FP64)
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{
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return GetSrcB(context, true);
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}
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throw new ArgumentException($"Invalid floating point type \"{floatType}\".");
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}
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public static Operand GetSrcB(EmitterContext context, bool isFP64 = false)
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public static Operand GetSrcCbuf(EmitterContext context, int cbufSlot, int cbufOffset, bool isFP64 = false)
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{
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if (isFP64)
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{
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switch (context.CurrOp)
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{
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case IOpCodeCbuf op:
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return context.PackDouble2x32(
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context.Config.CreateCbuf(op.Slot, op.Offset),
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context.Config.CreateCbuf(op.Slot, op.Offset + 1));
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case IOpCodeImmF op:
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return context.FP32ConvertToFP64(ConstF(op.Immediate));
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case IOpCodeReg op:
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return context.PackDouble2x32(Register(op.Rb.Index, op.Rb.Type), Register(op.Rb.Index | 1, op.Rb.Type));
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case IOpCodeRegCbuf op:
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return context.PackDouble2x32(Register(op.Rc.Index, op.Rc.Type), Register(op.Rc.Index | 1, op.Rc.Type));
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}
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return context.PackDouble2x32(
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context.Config.CreateCbuf(cbufSlot, cbufOffset),
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context.Config.CreateCbuf(cbufSlot, cbufOffset + 1));
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}
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else
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{
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switch (context.CurrOp)
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{
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case IOpCodeCbuf op:
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return context.Config.CreateCbuf(op.Slot, op.Offset);
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case IOpCodeImm op:
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return Const(op.Immediate);
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case IOpCodeImmF op:
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return ConstF(op.Immediate);
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case IOpCodeReg op:
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return Register(op.Rb);
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case IOpCodeRegCbuf op:
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return Register(op.Rc);
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}
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return context.Config.CreateCbuf(cbufSlot, cbufOffset);
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}
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throw new InvalidOperationException($"Unexpected opcode type \"{context.CurrOp.GetType().Name}\".");
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}
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public static Operand GetSrcC(EmitterContext context, bool isFP64 = false)
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public static Operand GetSrcImm(EmitterContext context, int imm, bool isFP64 = false)
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{
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if (isFP64)
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{
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switch (context.CurrOp)
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{
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case IOpCodeRegCbuf op:
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return context.PackDouble2x32(
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context.Config.CreateCbuf(op.Slot, op.Offset),
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context.Config.CreateCbuf(op.Slot, op.Offset + 1));
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case IOpCodeRc op:
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return context.PackDouble2x32(Register(op.Rc.Index, op.Rc.Type), Register(op.Rc.Index | 1, op.Rc.Type));
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}
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return context.FP32ConvertToFP64(Const(imm));
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}
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else
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{
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switch (context.CurrOp)
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{
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case IOpCodeRegCbuf op:
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return context.Config.CreateCbuf(op.Slot, op.Offset);
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case IOpCodeRc op:
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return Register(op.Rc);
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}
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return Const(imm);
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}
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throw new InvalidOperationException($"Unexpected opcode type \"{context.CurrOp.GetType().Name}\".");
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}
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public static Operand[] GetHalfSrcA(EmitterContext context, bool isAdd = false)
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public static Operand GetSrcReg(EmitterContext context, int reg, bool isFP64 = false)
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{
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OpCode op = context.CurrOp;
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bool absoluteA = false, negateA = false;
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if (op is OpCodeAluImm32 && isAdd)
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if (isFP64)
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{
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negateA = op.RawOpCode.Extract(56);
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return context.PackDouble2x32(Register(reg, RegisterType.Gpr), Register(reg | 1, RegisterType.Gpr));
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}
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else if (isAdd || op is IOpCodeCbuf || op is IOpCodeImm)
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else
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{
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negateA = op.RawOpCode.Extract(43);
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absoluteA = op.RawOpCode.Extract(44);
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return Register(reg, RegisterType.Gpr);
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}
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else if (op is IOpCodeReg)
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{
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absoluteA = op.RawOpCode.Extract(44);
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}
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FPHalfSwizzle swizzle = (FPHalfSwizzle)op.RawOpCode.Extract(47, 2);
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Operand[] operands = GetHalfUnpacked(context, GetSrcA(context), swizzle);
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return FPAbsNeg(context, operands, absoluteA, negateA);
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}
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public static Operand[] GetHalfSrcB(EmitterContext context, bool isMul = false)
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public static Operand[] GetHalfSrc(
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EmitterContext context,
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HalfSwizzle swizzle,
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int ra,
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bool negate,
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bool absolute)
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{
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OpCode op = context.CurrOp;
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Operand[] operands = GetHalfUnpacked(context, GetSrcReg(context, ra), swizzle);
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FPHalfSwizzle swizzle = FPHalfSwizzle.FP16;
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return FPAbsNeg(context, operands, absolute, negate);
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}
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bool absoluteB = false, negateB = false;
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public static Operand[] GetHalfSrc(
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EmitterContext context,
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HalfSwizzle swizzle,
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int cbufSlot,
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int cbufOffset,
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bool negate,
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bool absolute)
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{
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Operand[] operands = GetHalfUnpacked(context, GetSrcCbuf(context, cbufSlot, cbufOffset), swizzle);
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if (op is IOpCodeReg)
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return FPAbsNeg(context, operands, absolute, negate);
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}
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public static Operand[] GetHalfSrc(EmitterContext context, int immH0, int immH1)
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{
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ushort low = (ushort)(immH0 << 6);
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ushort high = (ushort)(immH1 << 6);
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return new Operand[]
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{
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swizzle = (FPHalfSwizzle)op.RawOpCode.Extract(28, 2);
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ConstF((float)Unsafe.As<ushort, Half>(ref low)),
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ConstF((float)Unsafe.As<ushort, Half>(ref high))
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};
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}
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absoluteB = op.RawOpCode.Extract(30);
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negateB = op.RawOpCode.Extract(31);
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}
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else if (op is IOpCodeCbuf)
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public static Operand[] GetHalfSrc(EmitterContext context, int imm32)
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{
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ushort low = (ushort)imm32;
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ushort high = (ushort)(imm32 >> 16);
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return new Operand[]
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{
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swizzle = FPHalfSwizzle.FP32;
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absoluteB = op.RawOpCode.Extract(54);
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if (!isMul)
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{
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negateB = op.RawOpCode.Extract(56);
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}
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}
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Operand[] operands = GetHalfUnpacked(context, GetSrcB(context), swizzle);
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return FPAbsNeg(context, operands, absoluteB, negateB);
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ConstF((float)Unsafe.As<ushort, Half>(ref low)),
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ConstF((float)Unsafe.As<ushort, Half>(ref high))
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};
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}
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public static Operand[] FPAbsNeg(EmitterContext context, Operand[] operands, bool abs, bool neg)
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@ -219,27 +137,27 @@ namespace Ryujinx.Graphics.Shader.Instructions
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return operands;
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}
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public static Operand[] GetHalfUnpacked(EmitterContext context, Operand src, FPHalfSwizzle swizzle)
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public static Operand[] GetHalfUnpacked(EmitterContext context, Operand src, HalfSwizzle swizzle)
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{
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switch (swizzle)
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{
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case FPHalfSwizzle.FP16:
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case HalfSwizzle.F16:
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return new Operand[]
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{
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context.UnpackHalf2x16Low (src),
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context.UnpackHalf2x16High(src)
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};
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case FPHalfSwizzle.FP32: return new Operand[] { src, src };
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case HalfSwizzle.F32: return new Operand[] { src, src };
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case FPHalfSwizzle.DupH0:
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case HalfSwizzle.H0H0:
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return new Operand[]
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{
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context.UnpackHalf2x16Low(src),
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context.UnpackHalf2x16Low(src)
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};
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case FPHalfSwizzle.DupH1:
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case HalfSwizzle.H1H1:
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return new Operand[]
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{
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context.UnpackHalf2x16High(src),
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@ -250,33 +168,24 @@ namespace Ryujinx.Graphics.Shader.Instructions
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throw new ArgumentException($"Invalid swizzle \"{swizzle}\".");
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}
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public static Operand GetHalfPacked(EmitterContext context, Operand[] results)
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public static Operand GetHalfPacked(EmitterContext context, OFmt swizzle, Operand[] results, int rd)
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{
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OpCode op = context.CurrOp;
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FPHalfSwizzle swizzle = FPHalfSwizzle.FP16;
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if (!(op is OpCodeAluImm32))
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{
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swizzle = (FPHalfSwizzle)context.CurrOp.RawOpCode.Extract(49, 2);
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}
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switch (swizzle)
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{
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case FPHalfSwizzle.FP16: return context.PackHalf2x16(results[0], results[1]);
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case OFmt.F16: return context.PackHalf2x16(results[0], results[1]);
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case FPHalfSwizzle.FP32: return results[0];
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case OFmt.F32: return results[0];
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case FPHalfSwizzle.DupH0:
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case OFmt.MrgH0:
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{
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Operand h1 = GetHalfDest(context, isHigh: true);
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Operand h1 = GetHalfDest(context, rd, isHigh: true);
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return context.PackHalf2x16(results[0], h1);
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}
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case FPHalfSwizzle.DupH1:
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case OFmt.MrgH1:
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{
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Operand h0 = GetHalfDest(context, isHigh: false);
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Operand h0 = GetHalfDest(context, rd, isHigh: false);
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return context.PackHalf2x16(h0, results[1]);
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}
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@ -285,25 +194,23 @@ namespace Ryujinx.Graphics.Shader.Instructions
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throw new ArgumentException($"Invalid swizzle \"{swizzle}\".");
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}
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public static Operand GetHalfDest(EmitterContext context, bool isHigh)
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public static Operand GetHalfDest(EmitterContext context, int rd, bool isHigh)
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{
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if (isHigh)
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{
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return context.UnpackHalf2x16High(GetDest(context));
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return context.UnpackHalf2x16High(GetDest(rd));
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}
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else
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{
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return context.UnpackHalf2x16Low(GetDest(context));
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return context.UnpackHalf2x16Low(GetDest(rd));
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}
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}
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public static Operand GetPredicate39(EmitterContext context)
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public static Operand GetPredicate(EmitterContext context, int pred, bool not)
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{
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IOpCodePredicate39 op = (IOpCodePredicate39)context.CurrOp;
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Operand local = Register(pred, RegisterType.Predicate);
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Operand local = Register(op.Predicate39);
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if (op.InvertP)
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if (not)
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{
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local = context.BitwiseNot(local);
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}
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@ -311,6 +218,26 @@ namespace Ryujinx.Graphics.Shader.Instructions
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return local;
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}
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public static int Imm16ToSInt(int imm16)
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{
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return (short)imm16;
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}
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public static int Imm20ToFloat(int imm20)
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{
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return imm20 << 12;
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}
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public static int Imm20ToSInt(int imm20)
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{
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return (imm20 << 12) >> 12;
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}
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public static int Imm24ToSInt(int imm24)
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{
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return (imm24 << 8) >> 8;
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}
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public static Operand SignExtendTo32(EmitterContext context, Operand src, int srcBits)
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{
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return context.BitfieldExtractS32(src, Const(0), Const(srcBits));
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@ -318,7 +245,7 @@ namespace Ryujinx.Graphics.Shader.Instructions
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public static Operand ZeroExtendTo32(EmitterContext context, Operand src, int srcBits)
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{
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int mask = (int)(0xffffffffu >> (32 - srcBits));
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int mask = (int)(uint.MaxValue >> (32 - srcBits));
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return context.BitwiseAnd(src, Const(mask));
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}
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