Add 9+7 fast/slow FP inst. impls.; add 14 FP Tests. (#437)
* Update CpuTest.cs * Delete CpuTestSimdCmp.cs Obsolete. * Update CpuTestSimdArithmetic.cs Superseded. * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Update ASoftFloat.cs * Nit. * Update AOpCodeTable.cs * Update AOptimizations.cs * Update AInstEmitSimdArithmetic.cs * Update ASoftFloat.cs * Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update ASoftFloat.cs * Update CpuTestSimdReg.cs * Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update ASoftFloat.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs
This commit is contained in:
LDj3SNuD
gdkchan
parent
0254a84f90
commit
bba9bf97d0
10 changed files with 2471 additions and 1162 deletions
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@ -178,8 +178,15 @@ namespace Ryujinx.Tests.Cpu
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return GetThreadState();
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}
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[Flags]
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protected enum FPSR
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/// <summary>Floating-point Control Register.</summary>
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protected enum FPCR
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{
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/// <summary>Default NaN mode control bit.</summary>
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DN = 25
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}
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/// <summary>Floating-point Status Register.</summary>
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[Flags] protected enum FPSR
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{
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None = 0,
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@ -195,32 +202,43 @@ namespace Ryujinx.Tests.Cpu
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IXC = 1 << 4,
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/// <summary>Input Denormal cumulative floating-point exception bit.</summary>
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IDC = 1 << 7,
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/// <summary>Cumulative saturation bit.</summary>
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QC = 1 << 27
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QC = 1 << 27
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}
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protected enum FpSkips { None, IfNaN_S, IfNaN_D };
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[Flags] protected enum FpSkips
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{
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None = 0,
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protected enum FpUseTolerance { None, OneUlps_S, OneUlps_D };
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IfNaN_S = 1,
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IfNaN_D = 2,
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IfUnderflow = 4,
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IfOverflow = 8
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}
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protected enum FpTolerances
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{
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None,
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UpToOneUlps_S,
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UpToOneUlps_D
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}
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protected void CompareAgainstUnicorn(
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FPSR FpsrMask = FPSR.None,
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FpSkips FpSkips = FpSkips.None,
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FpUseTolerance FpUseTolerance = FpUseTolerance.None)
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FPSR FpsrMask = FPSR.None,
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FpSkips FpSkips = FpSkips.None,
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FpTolerances FpTolerances = FpTolerances.None)
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{
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if (!UnicornAvailable)
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{
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return;
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}
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if (FpSkips == FpSkips.IfNaN_S && float.IsNaN(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)))
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if (FpSkips != FpSkips.None)
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{
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Assert.Ignore("NaN test.");
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}
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if (FpSkips == FpSkips.IfNaN_D && double.IsNaN(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.Ignore("NaN test.");
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ManageFpSkips(FpSkips);
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}
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Assert.That(Thread.ThreadState.X0, Is.EqualTo(UnicornEmu.X[0]));
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@ -257,50 +275,13 @@ namespace Ryujinx.Tests.Cpu
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Assert.That(Thread.ThreadState.X31, Is.EqualTo(UnicornEmu.SP));
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if (FpUseTolerance == FpUseTolerance.None)
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if (FpTolerances == FpTolerances.None)
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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else
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{
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if (!Is.EqualTo(UnicornEmu.Q[0]).ApplyTo(Thread.ThreadState.V0).IsSuccess)
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{
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if (FpUseTolerance == FpUseTolerance.OneUlps_S)
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{
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if (float.IsNormal (VectorExtractSingle(UnicornEmu.Q[0], (byte)0)) ||
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float.IsSubnormal(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)0),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)1),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)2),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)2)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)3),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)3)).Within(1).Ulps);
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}
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else
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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}
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if (FpUseTolerance == FpUseTolerance.OneUlps_D)
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{
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if (double.IsNormal (VectorExtractDouble(UnicornEmu.Q[0], (byte)0)) ||
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double.IsSubnormal(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)0),
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Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
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Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)1),
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Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
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}
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else
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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}
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}
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ManageFpTolerances(FpTolerances);
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}
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Assert.That(Thread.ThreadState.V1, Is.EqualTo(UnicornEmu.Q[1]));
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Assert.That(Thread.ThreadState.V2, Is.EqualTo(UnicornEmu.Q[2]));
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@ -344,6 +325,90 @@ namespace Ryujinx.Tests.Cpu
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Assert.That(Thread.ThreadState.Negative, Is.EqualTo(UnicornEmu.NegativeFlag));
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}
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private void ManageFpSkips(FpSkips FpSkips)
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{
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if (FpSkips.HasFlag(FpSkips.IfNaN_S))
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{
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if (float.IsNaN(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.Ignore("NaN test.");
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}
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}
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else if (FpSkips.HasFlag(FpSkips.IfNaN_D))
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{
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if (double.IsNaN(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.Ignore("NaN test.");
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}
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}
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if (FpSkips.HasFlag(FpSkips.IfUnderflow))
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{
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if ((UnicornEmu.Fpsr & (int)FPSR.UFC) != 0)
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{
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Assert.Ignore("Underflow test.");
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}
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}
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if (FpSkips.HasFlag(FpSkips.IfOverflow))
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{
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if ((UnicornEmu.Fpsr & (int)FPSR.OFC) != 0)
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{
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Assert.Ignore("Overflow test.");
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}
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}
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}
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private void ManageFpTolerances(FpTolerances FpTolerances)
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{
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if (!Is.EqualTo(UnicornEmu.Q[0]).ApplyTo(Thread.ThreadState.V0).IsSuccess)
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{
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if (FpTolerances == FpTolerances.UpToOneUlps_S)
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{
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if (IsNormalOrSubnormal_S(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)) &&
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IsNormalOrSubnormal_S(VectorExtractSingle(Thread.ThreadState.V0, (byte)0)))
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{
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)0),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)1),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)2),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)2)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)3),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)3)).Within(1).Ulps);
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Console.WriteLine(FpTolerances);
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}
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else
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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}
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if (FpTolerances == FpTolerances.UpToOneUlps_D)
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{
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if (IsNormalOrSubnormal_D(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)) &&
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IsNormalOrSubnormal_D(VectorExtractDouble(Thread.ThreadState.V0, (byte)0)))
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{
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Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)0),
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Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
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Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)1),
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Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
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Console.WriteLine(FpTolerances);
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}
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else
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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}
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}
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bool IsNormalOrSubnormal_S(float f) => float.IsNormal(f) || float.IsSubnormal(f);
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bool IsNormalOrSubnormal_D(double d) => double.IsNormal(d) || double.IsSubnormal(d);
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}
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protected static Vector128<float> MakeVectorE0(double E0)
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{
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if (!Sse2.IsSupported)
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@ -453,14 +518,14 @@ namespace Ryujinx.Tests.Cpu
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{
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uint Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextUInt();
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while ((Rnd & 0x7F800000u) == 0u ||
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(Rnd & 0x7F800000u) == 0x7F800000u);
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do Rnd = TestContext.CurrentContext.Random.NextUInt();
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while (( Rnd & 0x7F800000u) == 0u ||
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(~Rnd & 0x7F800000u) == 0u);
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return Rnd;
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}
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protected static uint GenSubNormal_S()
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protected static uint GenSubnormal_S()
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{
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uint Rnd;
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@ -474,14 +539,14 @@ namespace Ryujinx.Tests.Cpu
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{
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ulong Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextULong();
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while ((Rnd & 0x7FF0000000000000ul) == 0ul ||
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(Rnd & 0x7FF0000000000000ul) == 0x7FF0000000000000ul);
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do Rnd = TestContext.CurrentContext.Random.NextULong();
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while (( Rnd & 0x7FF0000000000000ul) == 0ul ||
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(~Rnd & 0x7FF0000000000000ul) == 0ul);
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return Rnd;
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}
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protected static ulong GenSubNormal_D()
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protected static ulong GenSubnormal_D()
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{
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ulong Rnd;
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