Fix/Add 1+12 [Saturating] [Rounded] Shift Right Narrow (imm.) Instructions; add 14 Tests. Add 6 Tests for PR#405. Add 2 Tests for PR#412. (#409)
* Update AOpCodeTable.cs * Update AInstEmitSimdShift.cs * Update CpuTestSimdShImm.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Create CpuTestSimdIns.cs * Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update CpuTest.cs * Update CpuTestSimdReg.cs * Update CpuTestSimd.cs
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LDj3SNuD
gdkchan
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8a78a703f2
commit
c7387be0d2
9 changed files with 1254 additions and 303 deletions
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@ -93,6 +93,7 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V0 = default(Vector128<float>),
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Vector128<float> V1 = default(Vector128<float>),
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Vector128<float> V2 = default(Vector128<float>),
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Vector128<float> V3 = default(Vector128<float>),
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bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false,
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int Fpcr = 0x0, int Fpsr = 0x0)
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{
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@ -106,6 +107,7 @@ namespace Ryujinx.Tests.Cpu
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Thread.ThreadState.V0 = V0;
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Thread.ThreadState.V1 = V1;
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Thread.ThreadState.V2 = V2;
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Thread.ThreadState.V3 = V3;
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Thread.ThreadState.Overflow = Overflow;
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Thread.ThreadState.Carry = Carry;
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@ -127,6 +129,7 @@ namespace Ryujinx.Tests.Cpu
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UnicornEmu.Q[0] = V0;
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UnicornEmu.Q[1] = V1;
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UnicornEmu.Q[2] = V2;
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UnicornEmu.Q[3] = V3;
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UnicornEmu.OverflowFlag = Overflow;
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UnicornEmu.CarryFlag = Carry;
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@ -162,13 +165,14 @@ namespace Ryujinx.Tests.Cpu
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Vector128<float> V0 = default(Vector128<float>),
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Vector128<float> V1 = default(Vector128<float>),
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Vector128<float> V2 = default(Vector128<float>),
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Vector128<float> V3 = default(Vector128<float>),
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bool Overflow = false, bool Carry = false, bool Zero = false, bool Negative = false,
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int Fpcr = 0x0, int Fpsr = 0x0)
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{
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this.Opcode(Opcode);
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this.Opcode(0xD4200000); // BRK #0
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this.Opcode(0xD65F03C0); // RET
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SetThreadState(X0, X1, X2, X3, X31, V0, V1, V2, Overflow, Carry, Zero, Negative, Fpcr, Fpsr);
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SetThreadState(X0, X1, X2, X3, X31, V0, V1, V2, V3, Overflow, Carry, Zero, Negative, Fpcr, Fpsr);
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ExecuteOpcodes();
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return GetThreadState();
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@ -195,13 +199,30 @@ namespace Ryujinx.Tests.Cpu
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QC = 1 << 27
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}
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protected void CompareAgainstUnicorn(FPSR FpsrMask = FPSR.None)
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protected enum FpSkips { None, IfNaN_S, IfNaN_D };
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protected enum FpUseTolerance { None, OneUlps_S, OneUlps_D };
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protected void CompareAgainstUnicorn(
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FPSR FpsrMask = FPSR.None,
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FpSkips FpSkips = FpSkips.None,
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FpUseTolerance FpUseTolerance = FpUseTolerance.None)
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{
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if (!UnicornAvailable)
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{
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return;
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}
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if (FpSkips == FpSkips.IfNaN_S && float.IsNaN(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.Ignore("NaN test.");
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}
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if (FpSkips == FpSkips.IfNaN_D && double.IsNaN(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.Ignore("NaN test.");
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}
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Assert.That(Thread.ThreadState.X0, Is.EqualTo(UnicornEmu.X[0]));
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Assert.That(Thread.ThreadState.X1, Is.EqualTo(UnicornEmu.X[1]));
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Assert.That(Thread.ThreadState.X2, Is.EqualTo(UnicornEmu.X[2]));
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@ -236,7 +257,51 @@ namespace Ryujinx.Tests.Cpu
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Assert.That(Thread.ThreadState.X31, Is.EqualTo(UnicornEmu.SP));
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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if (FpUseTolerance == FpUseTolerance.None)
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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else
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{
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if (!Is.EqualTo(UnicornEmu.Q[0]).ApplyTo(Thread.ThreadState.V0).IsSuccess)
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{
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if (FpUseTolerance == FpUseTolerance.OneUlps_S)
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{
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if (float.IsNormal (VectorExtractSingle(UnicornEmu.Q[0], (byte)0)) ||
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float.IsSubnormal(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)0),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)1),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)2),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)2)).Within(1).Ulps);
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Assert.That (VectorExtractSingle(Thread.ThreadState.V0, (byte)3),
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Is.EqualTo(VectorExtractSingle(UnicornEmu.Q[0], (byte)3)).Within(1).Ulps);
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}
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else
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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}
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if (FpUseTolerance == FpUseTolerance.OneUlps_D)
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{
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if (double.IsNormal (VectorExtractDouble(UnicornEmu.Q[0], (byte)0)) ||
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double.IsSubnormal(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)))
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{
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Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)0),
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Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)0)).Within(1).Ulps);
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Assert.That (VectorExtractDouble(Thread.ThreadState.V0, (byte)1),
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Is.EqualTo(VectorExtractDouble(UnicornEmu.Q[0], (byte)1)).Within(1).Ulps);
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}
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else
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{
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Assert.That(Thread.ThreadState.V0, Is.EqualTo(UnicornEmu.Q[0]));
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}
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}
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}
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}
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Assert.That(Thread.ThreadState.V1, Is.EqualTo(UnicornEmu.Q[1]));
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Assert.That(Thread.ThreadState.V2, Is.EqualTo(UnicornEmu.Q[2]));
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Assert.That(Thread.ThreadState.V3, Is.EqualTo(UnicornEmu.Q[3]));
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@ -310,6 +375,18 @@ namespace Ryujinx.Tests.Cpu
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return Sse.StaticCast<long, float>(Sse2.SetVector128(BitConverter.DoubleToInt64Bits(E1), 0));
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}
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protected static float VectorExtractSingle(Vector128<float> Vector, byte Index)
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{
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if (!Sse41.IsSupported)
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{
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throw new PlatformNotSupportedException();
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}
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int Value = Sse41.Extract(Sse.StaticCast<float, int>(Vector), Index);
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return BitConverter.Int32BitsToSingle(Value);
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}
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protected static double VectorExtractDouble(Vector128<float> Vector, byte Index)
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{
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if (!Sse41.IsSupported)
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@ -371,5 +448,47 @@ namespace Ryujinx.Tests.Cpu
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return Sse41.Extract(Sse.StaticCast<float, ulong>(Vector), (byte)1);
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}
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protected static uint GenNormal_S()
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{
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uint Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextUInt();
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while ((Rnd & 0x7F800000u) == 0u ||
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(Rnd & 0x7F800000u) == 0x7F800000u);
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return Rnd;
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}
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protected static uint GenSubNormal_S()
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{
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uint Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextUInt();
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while ((Rnd & 0x007FFFFFu) == 0u);
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return Rnd & 0x807FFFFFu;
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}
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protected static ulong GenNormal_D()
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{
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ulong Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextULong();
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while ((Rnd & 0x7FF0000000000000ul) == 0ul ||
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(Rnd & 0x7FF0000000000000ul) == 0x7FF0000000000000ul);
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return Rnd;
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}
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protected static ulong GenSubNormal_D()
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{
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ulong Rnd;
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do Rnd = TestContext.CurrentContext.Random.NextULong();
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while ((Rnd & 0x000FFFFFFFFFFFFFul) == 0ul);
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return Rnd & 0x800FFFFFFFFFFFFFul;
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}
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}
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}
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