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Fix Fcvtl_V and Fcvtn_V; fix half to float conv. and add float to half conv. (full FP emu.). Add 4 FP Tests. (#468)

Browse source 
* Update CpuTest.cs

* Update CpuTestSimd.cs

* Superseded.

* Update AInstEmitSimdCvt.cs

* Update ASoftFloat.cs

* Nit.

* Update PackageReferences.

* Update AInstEmitSimdArithmetic.cs

* Update AVectorHelper.cs

* Update ASoftFloat.cs

* Update ASoftFallback.cs

* Update AThreadState.cs

* Create FPType.cs

* Create FPExc.cs

* Create FPCR.cs

* Create FPSR.cs

* Update ARoundMode.cs

* Update APState.cs

* Avoid an unwanted implicit cast of the operator >= to long, continuing to check for negative values. Remove a leftover.

* Nits.
This commit is contained in:
LDj3SNuD 2018-10-23 16:12:45 +02:00 • committed by gdkchan
parent 7920dc1d2f
commit e674b37710
18 changed files with 863 additions and 200 deletions
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10
ChocolArm64/Instruction/AInstEmitSimdHelper.cs
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@ -1274,8 +1274,6 @@ namespace ChocolArm64.Instruction
{
ThrowIfInvalid(Index, Size);
IAOpCodeSimd Op = (IAOpCodeSimd)Context.CurrOp;
Context.EmitLdvec(Reg);
Context.EmitLdc_I4(Index);
Context.EmitLdc_I4(Size);
@ -1470,12 +1468,12 @@ namespace ChocolArm64.Instruction
private static void ThrowIfInvalid(int Index, int Size)
{
if ((uint)Size > 3)
if ((uint)Size > 3u)
{
throw new ArgumentOutOfRangeException(nameof(Size));
}
if ((uint)Index >= 16 >> Size)
if ((uint)Index >= 16u >> Size)
{
throw new ArgumentOutOfRangeException(nameof(Index));
}
@ -1483,12 +1481,12 @@ namespace ChocolArm64.Instruction
private static void ThrowIfInvalidF(int Index, int Size)
{
if ((uint)Size > 1)
if ((uint)Size > 1u)
{
throw new ArgumentOutOfRangeException(nameof(Size));
}
if ((uint)Index >= 4 >> Size)
if ((uint)Index >= 4u >> Size)
{
throw new ArgumentOutOfRangeException(nameof(Index));
}