Replace unicorn bindings with Nuget package (#4378)
* Replace unicorn bindings with Nuget package * Use nameof for ValueSource args * Remove redundant code from test projects * Fix wrong values for EmuStart() Add notes to address this later again * Improve formatting * Fix formatting/alignment issues
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TSRBerry
GitHub
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64 changed files with 2276 additions and 3576 deletions
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@ -36,7 +36,7 @@ namespace Ryujinx.Tests.Cpu
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// - xor 0
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// Only includes non-C variant, as the other can be tested with unicorn.
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return new CrcTest[]
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return new[]
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{
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new CrcTest(0x00000000u, 0x00_00_00_00_00_00_00_00u, false, 0x00000000, 0x00000000, 0x00000000, 0x00000000),
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new CrcTest(0x00000000u, 0x7f_ff_ff_ff_ff_ff_ff_ffu, false, 0x2d02ef8d, 0xbe2612ff, 0xdebb20e3, 0xa9de8355),
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@ -53,14 +53,12 @@ namespace Ryujinx.Tests.Cpu
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}
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#endregion
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private const int RndCnt = 2;
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[Test, Combinatorial]
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public void Crc32_b_h_w_x([Values(0u)] uint rd,
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[Values(1u)] uint rn,
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[Values(2u)] uint rm,
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[Range(0u, 3u)] uint size,
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[ValueSource("_CRC32_Test_Values_")] CrcTest test)
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[ValueSource(nameof(_CRC32_Test_Values_))] CrcTest test)
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{
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uint opcode = 0x1AC04000; // CRC32B W0, W0, W0
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@ -85,11 +83,11 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32x([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((ulong)0x00_00_00_00_00_00_00_00,
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(ulong)0x7F_FF_FF_FF_FF_FF_FF_FF,
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(ulong)0x80_00_00_00_00_00_00_00,
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(ulong)0xFF_FF_FF_FF_FF_FF_FF_FF)] [Random(RndCnt)] ulong xm)
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0x80_00_00_00_00_00_00_00,
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0xFF_FF_FF_FF_FF_FF_FF_FF)] ulong xm)
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{
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uint opcode = 0x9AC04C00; // CRC32X W0, W0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -105,9 +103,9 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32w([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF,
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(uint)0x80_00_00_00, (uint)0xFF_FF_FF_FF)] [Random(RndCnt)] uint wm)
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0x80_00_00_00, 0xFF_FF_FF_FF)] uint wm)
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{
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uint opcode = 0x1AC04800; // CRC32W W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -123,9 +121,9 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32h([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((ushort)0x00_00, (ushort)0x7F_FF,
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(ushort)0x80_00, (ushort)0xFF_FF)] [Random(RndCnt)] ushort wm)
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(ushort)0x80_00, (ushort)0xFF_FF)] ushort wm)
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{
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uint opcode = 0x1AC04400; // CRC32H W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -141,9 +139,9 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32b([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((byte)0x00, (byte)0x7F,
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(byte)0x80, (byte)0xFF)] [Random(RndCnt)] byte wm)
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(byte)0x80, (byte)0xFF)] byte wm)
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{
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uint opcode = 0x1AC04000; // CRC32B W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -159,11 +157,11 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32cx([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((ulong)0x00_00_00_00_00_00_00_00,
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(ulong)0x7F_FF_FF_FF_FF_FF_FF_FF,
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(ulong)0x80_00_00_00_00_00_00_00,
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(ulong)0xFF_FF_FF_FF_FF_FF_FF_FF)] [Random(RndCnt)] ulong xm)
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0x80_00_00_00_00_00_00_00,
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0xFF_FF_FF_FF_FF_FF_FF_FF)] ulong xm)
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{
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uint opcode = 0x9AC05C00; // CRC32CX W0, W0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -179,9 +177,9 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32cw([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF,
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(uint)0x80_00_00_00, (uint)0xFF_FF_FF_FF)] [Random(RndCnt)] uint wm)
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0x80_00_00_00, 0xFF_FF_FF_FF)] uint wm)
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{
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uint opcode = 0x1AC05800; // CRC32CW W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -197,9 +195,9 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32ch([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((ushort)0x00_00, (ushort)0x7F_FF,
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(ushort)0x80_00, (ushort)0xFF_FF)] [Random(RndCnt)] ushort wm)
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(ushort)0x80_00, (ushort)0xFF_FF)] ushort wm)
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{
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uint opcode = 0x1AC05400; // CRC32CH W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -215,9 +213,9 @@ namespace Ryujinx.Tests.Cpu
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public void Crc32cb([Values(0u, 31u)] uint rd,
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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[Values(0x00000000u, 0xFFFFFFFFu)] uint wn,
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[Values((byte)0x00, (byte)0x7F,
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(byte)0x80, (byte)0xFF)] [Random(RndCnt)] byte wm)
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(byte)0x80, (byte)0xFF)] byte wm)
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{
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uint opcode = 0x1AC05000; // CRC32CB W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -234,9 +232,9 @@ namespace Ryujinx.Tests.Cpu
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm)
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm)
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{
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uint opcode = 0x9AC00C00; // SDIV X0, X0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -253,9 +251,9 @@ namespace Ryujinx.Tests.Cpu
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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0x80000000u, 0xFFFFFFFFu)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
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0x80000000u, 0xFFFFFFFFu)] uint wm)
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{
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uint opcode = 0x1AC00C00; // SDIV W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -272,9 +270,9 @@ namespace Ryujinx.Tests.Cpu
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xn,
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[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm)
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0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] ulong xm)
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{
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uint opcode = 0x9AC00800; // UDIV X0, X0, X0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -291,9 +289,9 @@ namespace Ryujinx.Tests.Cpu
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[Values(1u, 31u)] uint rn,
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[Values(2u, 31u)] uint rm,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn,
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0x80000000u, 0xFFFFFFFFu)] uint wn,
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[Values(0x00000000u, 0x7FFFFFFFu,
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0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm)
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0x80000000u, 0xFFFFFFFFu)] uint wm)
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{
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uint opcode = 0x1AC00800; // UDIV W0, W0, W0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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@ -306,4 +304,4 @@ namespace Ryujinx.Tests.Cpu
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}
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#endif
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}
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}
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}
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