Mirrors/Ryujinx
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

Fix REV64 (vector) instruction

Browse source
This commit is contained in:
gdkchan 2018-03-02 20:24:16 -03:00
parent 829b1b1cc0
commit efef605b26
3 changed files with 22 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

26
ChocolArm64/Instruction/AInstEmitSimdLogical.cs
View file

@ -1,5 +1,6 @@
using ChocolArm64.Decoder;
using ChocolArm64.State;
using ChocolArm64.Translation;
using System;
using System.Reflection.Emit;
using static ChocolArm64.Instruction.AInstEmitSimdHelper;
@ -69,12 +70,25 @@ namespace ChocolArm64.Instruction
public static void Rev64_V(AILEmitterCtx Context)
{
Action Emit = () =>
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
int Bytes = Context.CurrOp.GetBitsCount() >> 3;
int Elems = Bytes >> Op.Size;
int RevIndex = Elems - 1;
for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
{
ASoftFallback.EmitCall(Context, nameof(ASoftFallback.ReverseBits64));
};
EmitVectorUnaryOpZx(Context, Emit);
EmitVectorExtractZx(Context, Op.Rn, RevIndex--, Op.Size);
EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
}
if (Op.RegisterSize == ARegisterSize.SIMD64)
{
EmitVectorZeroUpper(Context, Op.Rd);
}
}
}
}