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Implement CPU FCVT Half <-> Double conversion variants (#3439)

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* Half <-> Double conversion support

* Add tests, fast path and deduplicate SoftFloat code

* PPTC version
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gdkchan 2022-07-06 08:40:31 -03:00 • committed by GitHub
parent b46b63e06a
commit f7ef6364b7
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5 changed files with 729 additions and 406 deletions
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45
Ryujinx.Tests/Cpu/CpuTestSimd.cs
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@ -825,6 +825,14 @@ namespace Ryujinx.Tests.Cpu
};
}
private static uint[] _F_Cvt_S_DH_()
{
return new uint[]
{
0x1E63C020u // FCVT H0, D1
};
}
private static uint[] _F_Cvt_S_HS_()
{
return new uint[]
@ -833,6 +841,14 @@ namespace Ryujinx.Tests.Cpu
};
}
private static uint[] _F_Cvt_S_HD_()
{
return new uint[]
{
0x1EE2C020u // FCVT D0, H1
};
}
private static uint[] _F_Cvt_ANZ_SU_S_S_()
{
return new uint[]
@ -1998,6 +2014,22 @@ namespace Ryujinx.Tests.Cpu
CompareAgainstUnicorn();
}
[Test, Pairwise] [Explicit]
public void F_Cvt_S_DH([ValueSource("_F_Cvt_S_DH_")] uint opcodes,
[ValueSource("_1D_F_")] ulong a,
[Values(RMode.Rn)] RMode rMode)
{
ulong z = TestContext.CurrentContext.Random.NextULong();
V128 v0 = MakeVectorE0E1(z, z);
V128 v1 = MakeVectorE0(a);
int fpcr = (int)rMode << (int)Fpcr.RMode;
SingleOpcode(opcodes, v0: v0, v1: v1, fpcr: fpcr);
CompareAgainstUnicorn();
}
[Test, Pairwise] [Explicit]
public void F_Cvt_S_HS([ValueSource("_F_Cvt_S_HS_")] uint opcodes,
[ValueSource("_1H_F_")] ulong a)
@ -2011,6 +2043,19 @@ namespace Ryujinx.Tests.Cpu
CompareAgainstUnicorn();
}
[Test, Pairwise] [Explicit]
public void F_Cvt_S_HD([ValueSource("_F_Cvt_S_HD_")] uint opcodes,
[ValueSource("_1H_F_")] ulong a)
{
ulong z = TestContext.CurrentContext.Random.NextULong();
V128 v0 = MakeVectorE0E1(z, z);
V128 v1 = MakeVectorE0(a);
SingleOpcode(opcodes, v0: v0, v1: v1);
CompareAgainstUnicorn();
}
[Test, Pairwise] [Explicit]
public void F_Cvt_ANZ_SU_S_S([ValueSource("_F_Cvt_ANZ_SU_S_S_")] uint opcodes,
[ValueSource("_1S_F_W_")] ulong a)