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Merge branch 'threading' of https://github.com/bunnei/citra

Browse source 
Conflicts:
	src/core/hle/function_wrappers.h
	src/core/hle/service/gsp.cpp
This commit is contained in:
bunnei 2014-06-14 12:13:16 -04:00
commit 004df76795
41 changed files with 1279 additions and 1235 deletions
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14
src/core/arm/interpreter/arm_interpreter.cpp
View file

@ -98,7 +98,7 @@ u64 ARM_Interpreter::GetTicks() const {
* @param num_instructions Number of instructions to executes
*/
void ARM_Interpreter::ExecuteInstructions(int num_instructions) {
state->NumInstrsToExecute = num_instructions;
state->NumInstrsToExecute = num_instructions - 1;
ARMul_Emulate32(state);
}
@ -118,6 +118,9 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) {
ctx.fpscr = state->VFP[1];
ctx.fpexc = state->VFP[2];
ctx.reg_15 = state->Reg[15];
ctx.mode = state->NextInstr;
}
/**
@ -137,6 +140,11 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) {
state->VFP[1] = ctx.fpscr;
state->VFP[2] = ctx.fpexc;
state->Reg[15] = ctx.pc;
state->NextInstr = RESUME;
state->Reg[15] = ctx.reg_15;
state->NextInstr = ctx.mode;
}
/// Prepare core for thread reschedule (if needed to correctly handle state)
void ARM_Interpreter::PrepareReschedule() {
state->NumInstrsToExecute = 0;
}

3
src/core/arm/interpreter/arm_interpreter.h
View file

@ -72,6 +72,9 @@ public:
*/
void LoadContext(const ThreadContext& ctx);
/// Prepare core for thread reschedule (if needed to correctly handle state)
void PrepareReschedule();
protected:
/**

18
src/core/arm/interpreter/armemu.cpp
View file

@ -4456,6 +4456,7 @@ ARMul_Emulate26 (ARMul_State * state)
}
/* Drop through. */
case 0xe0:
case 0xe4:
case 0xe6:
case 0xe8:
@ -4489,7 +4490,6 @@ ARMul_Emulate26 (ARMul_State * state)
/* Co-Processor Register Transfers (MRC) and Data Ops. */
case 0xe0:
case 0xe1:
case 0xe3:
case 0xe5:
@ -4533,23 +4533,7 @@ ARMul_Emulate26 (ARMul_State * state)
case 0xfd:
case 0xfe:
case 0xff:
if (instr == ARMul_ABORTWORD
&& state->AbortAddr == pc) {
/* A prefetch abort. */
XScale_set_fsr_far (state,
ARMul_CP15_R5_MMU_EXCPT,
pc);
ARMul_Abort (state,
ARMul_PrefetchAbortV);
break;
}
//sky_pref_t* pref = get_skyeye_pref();
//if(pref->user_mode_sim){
// ARMul_OSHandleSWI (state, BITS (0, 23));
// break;
//}
HLE::CallSVC(instr);
ARMul_Abort (state, ARMul_SWIV);
break;
}
}