Memory: Remove count of cached pages and add InvalidateRegion
In a future commit, the count of cached pages will be reintroduced in the actual surface cache. Also adds an Invalidate only to the cache which marks a region as invalid in order to try to avoid a costly flush from 3ds memory
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c821c14908
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13606a6d0b
8 changed files with 50 additions and 54 deletions
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@ -96,20 +96,11 @@ static void MemoryFill(const Regs::MemoryFillConfig& config) {
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u8* start = Memory::GetPhysicalPointer(start_addr);
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u8* end = Memory::GetPhysicalPointer(end_addr);
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// TODO: Consider always accelerating and returning vector of
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// regions that the accelerated fill did not cover to
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// reduce/eliminate the fill that the cpu has to do.
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// This would also mean that the flush below is not needed.
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// Fill should first flush all surfaces that touch but are
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// not completely within the fill range.
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// Then fill all completely covered surfaces, and return the
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// regions that were between surfaces or within the touching
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// ones for cpu to manually fill here.
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if (VideoCore::g_renderer->Rasterizer()->AccelerateFill(config))
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return;
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Memory::RasterizerFlushAndInvalidateRegion(config.GetStartAddress(),
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config.GetEndAddress() - config.GetStartAddress());
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Memory::RasterizerInvalidateRegion(config.GetStartAddress(),
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config.GetEndAddress() - config.GetStartAddress());
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if (config.fill_24bit) {
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// fill with 24-bit values
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@ -199,7 +190,7 @@ static void DisplayTransfer(const Regs::DisplayTransferConfig& config) {
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u32 output_size = output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(), input_size);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(), output_size);
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Memory::RasterizerInvalidateRegion(config.GetPhysicalOutputAddress(), output_size);
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for (u32 y = 0; y < output_height; ++y) {
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for (u32 x = 0; x < output_width; ++x) {
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@ -363,8 +354,10 @@ static void TextureCopy(const Regs::DisplayTransferConfig& config) {
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size_t contiguous_output_size =
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config.texture_copy.size / output_width * (output_width + output_gap);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(),
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static_cast<u32>(contiguous_output_size));
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// Only need to flush output if it has a gap
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const auto FlushInvalidate_fn = (output_gap != 0) ? Memory::RasterizerFlushAndInvalidateRegion
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: Memory::RasterizerInvalidateRegion;
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FlushInvalidate_fn(config.GetPhysicalOutputAddress(), static_cast<u32>(contiguous_output_size));
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u32 remaining_input = input_width;
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u32 remaining_output = output_width;
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@ -446,16 +439,18 @@ inline void Write(u32 addr, const T data) {
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if (config.is_texture_copy) {
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TextureCopy(config);
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LOG_TRACE(HW_GPU, "TextureCopy: 0x%X bytes from 0x%08X(%u+%u)-> "
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"0x%08X(%u+%u), flags 0x%08X",
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LOG_TRACE(HW_GPU,
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"TextureCopy: 0x%X bytes from 0x%08X(%u+%u)-> "
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"0x%08X(%u+%u), flags 0x%08X",
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config.texture_copy.size, config.GetPhysicalInputAddress(),
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config.texture_copy.input_width * 16, config.texture_copy.input_gap * 16,
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config.GetPhysicalOutputAddress(), config.texture_copy.output_width * 16,
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config.texture_copy.output_gap * 16, config.flags);
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} else {
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DisplayTransfer(config);
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LOG_TRACE(HW_GPU, "DisplayTransfer: 0x%08x(%ux%u)-> "
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"0x%08x(%ux%u), dst format %x, flags 0x%08X",
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LOG_TRACE(HW_GPU,
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"DisplayTransfer: 0x%08x(%ux%u)-> "
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"0x%08x(%ux%u), dst format %x, flags 0x%08X",
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config.GetPhysicalInputAddress(), config.input_width.Value(),
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config.input_height.Value(), config.GetPhysicalOutputAddress(),
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config.output_width.Value(), config.output_height.Value(),
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@ -570,4 +565,4 @@ void Shutdown() {
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LOG_DEBUG(HW_GPU, "shutdown OK");
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}
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} // namespace
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} // namespace GPU
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