Rename LCD to GPU.
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parent
87e98ff97b
commit
1dfa392824
11 changed files with 41 additions and 41 deletions
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@ -8,12 +8,12 @@
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#include "core/core.h"
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#include "core/mem_map.h"
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#include "core/hle/kernel/thread.h"
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#include "core/hw/lcd.h"
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#include "core/hw/gpu.h"
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#include "video_core/video_core.h"
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namespace LCD {
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namespace GPU {
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Registers g_regs;
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@ -61,7 +61,7 @@ const FramebufferLocation GetFramebufferLocation() {
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} else if ((g_regs.framebuffer_top_right_1 & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) {
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return FRAMEBUFFER_LOCATION_FCRAM;
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} else {
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ERROR_LOG(LCD, "unknown framebuffer location!");
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ERROR_LOG(GPU, "unknown framebuffer location!");
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}
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return FRAMEBUFFER_LOCATION_UNKNOWN;
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}
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@ -78,7 +78,7 @@ const u8* GetFramebufferPointer(const u32 address) {
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case FRAMEBUFFER_LOCATION_VRAM:
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return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_VRAM(address));
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default:
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ERROR_LOG(LCD, "unknown framebuffer location");
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ERROR_LOG(GPU, "unknown framebuffer location");
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}
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return NULL;
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}
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@ -123,7 +123,7 @@ inline void Read(T &var, const u32 addr) {
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break;
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default:
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ERROR_LOG(LCD, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
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ERROR_LOG(GPU, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
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break;
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}
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}
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@ -144,13 +144,13 @@ inline void Write(u32 addr, const T data) {
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if (g_regs.command_processing_enabled & 1)
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{
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// u32* buffer = (u32*)Memory::GetPointer(g_regs.command_list_address << 3);
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ERROR_LOG(LCD, "Beginning %x bytes of commands from address %x", g_regs.command_list_size, g_regs.command_list_address << 3);
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ERROR_LOG(GPU, "Beginning %x bytes of commands from address %x", g_regs.command_list_size, g_regs.command_list_address << 3);
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// TODO: Process command list!
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}
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break;
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default:
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ERROR_LOG(LCD, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
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ERROR_LOG(GPU, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
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break;
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}
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}
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@ -183,12 +183,12 @@ void Update() {
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void Init() {
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g_last_ticks = Core::g_app_core->GetTicks();
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SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM);
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NOTICE_LOG(LCD, "initialized OK");
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NOTICE_LOG(GPU, "initialized OK");
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}
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/// Shutdown hardware
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void Shutdown() {
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NOTICE_LOG(LCD, "shutdown OK");
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NOTICE_LOG(GPU, "shutdown OK");
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}
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} // namespace
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@ -6,7 +6,7 @@
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#include "common/common_types.h"
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namespace LCD {
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namespace GPU {
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struct Registers {
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u32 framebuffer_top_left_1;
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@ -6,7 +6,7 @@
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#include "common/log.h"
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#include "core/hw/hw.h"
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#include "core/hw/lcd.h"
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#include "core/hw/gpu.h"
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#include "core/hw/ndma.h"
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namespace HW {
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@ -34,7 +34,7 @@ enum {
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VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
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VADDR_DSP_2 = 0x1ED03000,
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VADDR_HASH_2 = 0x1EE01000,
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VADDR_LCD = 0x1EF00000,
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VADDR_GPU = 0x1EF00000,
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};
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template <typename T>
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@ -46,8 +46,8 @@ inline void Read(T &var, const u32 addr) {
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// NDMA::Read(var, addr);
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// break;
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case VADDR_LCD:
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LCD::Read(var, addr);
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case VADDR_GPU:
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GPU::Read(var, addr);
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break;
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default:
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@ -64,8 +64,8 @@ inline void Write(u32 addr, const T data) {
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// NDMA::Write(addr, data);
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// break;
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case VADDR_LCD:
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LCD::Write(addr, data);
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case VADDR_GPU:
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GPU::Write(addr, data);
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break;
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default:
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@ -87,13 +87,13 @@ template void Write<u8>(u32 addr, const u8 data);
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/// Update hardware
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void Update() {
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LCD::Update();
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GPU::Update();
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NDMA::Update();
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}
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/// Initialize hardware
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void Init() {
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LCD::Init();
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GPU::Init();
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NDMA::Init();
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NOTICE_LOG(HW, "initialized OK");
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}
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@ -37,12 +37,12 @@ void Update() {
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/// Initialize hardware
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void Init() {
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NOTICE_LOG(LCD, "initialized OK");
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NOTICE_LOG(GPU, "initialized OK");
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}
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/// Shutdown hardware
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void Shutdown() {
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NOTICE_LOG(LCD, "shutdown OK");
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NOTICE_LOG(GPU, "shutdown OK");
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}
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} // namespace
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