Core timing 2.0 (#4913)

* Core::Timing: Add multiple timer, one for each core

* revert clang-format; work on tests for CoreTiming

* Kernel:: Add support for multiple cores, asserts in HandleSyncRequest because Thread->status == WaitIPC

* Add some TRACE_LOGs

* fix tests

* make some adjustments to qt-debugger, cheats and gdbstub(probably still broken)

* Make ARM_Interface::id private, rework ARM_Interface ctor

* ReRename TimingManager to Timing for smaler diff

* addressed review comments
This commit is contained in:
Ben 2020-02-21 19:31:32 +01:00 committed by GitHub
parent e3dbdcbdff
commit 55ec7031cc
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32 changed files with 760 additions and 535 deletions

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@ -46,7 +46,9 @@ void RPCServer::HandleWriteMemory(Packet& packet, u32 address, const u8* data, u
Core::System::GetInstance().Memory().WriteBlock(
*Core::System::GetInstance().Kernel().GetCurrentProcess(), address, data, data_size);
// If the memory happens to be executable code, make sure the changes become visible
Core::CPU().InvalidateCacheRange(address, data_size);
// Is current core correct here?
Core::System::GetInstance().InvalidateCacheRange(address, data_size);
}
packet.SetPacketDataSize(0);
packet.SendReply();