core/arm: Improve timing accuracy before service calls in JIT
We also correct the CPU JIT's implementation of Step.
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dc030c78c3
commit
7cd8b437aa
9 changed files with 59 additions and 53 deletions
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@ -24,19 +24,11 @@ public:
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u32 fpexc;
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};
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/**
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* Runs the CPU for the given number of instructions
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* @param num_instructions Number of instructions to run
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*/
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void Run(int num_instructions) {
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ExecuteInstructions(num_instructions);
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this->num_instructions += num_instructions;
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}
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/// Runs the CPU until an event happens
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virtual void Run() = 0;
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/// Step CPU by one instruction
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void Step() {
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Run(1);
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}
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virtual void Step() = 0;
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/// Clear all instruction cache
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virtual void ClearInstructionCache() = 0;
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@ -138,19 +130,4 @@ public:
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/// Prepare core for thread reschedule (if needed to correctly handle state)
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virtual void PrepareReschedule() = 0;
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/// Getter for num_instructions
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u64 GetNumInstructions() const {
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return num_instructions;
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}
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protected:
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/**
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* Executes the given number of instructions
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* @param num_instructions Number of instructions to executes
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*/
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virtual void ExecuteInstructions(int num_instructions) = 0;
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private:
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u64 num_instructions = 0; ///< Number of instructions executed
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};
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