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pica: correct bit field length for some registers

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This commit is contained in:
wwylele 2017-05-15 18:14:03 +03:00
parent db22b88fea
commit 86ee1f6101
4 changed files with 25 additions and 17 deletions
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7
src/video_core/regs_framebuffer.h
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@ -211,13 +211,14 @@ struct FramebufferRegs {
BitField<0, 2, u32> allow_depth_stencil_write; // 0 = disable, else enable
};
DepthFormat depth_format; // TODO: Should be a BitField!
BitField<0, 2, DepthFormat> depth_format;
BitField<16, 3, ColorFormat> color_format;
INSERT_PADDING_WORDS(0x4);
u32 depth_buffer_address;
u32 color_buffer_address;
BitField<0, 28, u32> depth_buffer_address;
BitField<0, 28, u32> color_buffer_address;
union {
// Apparently, the framebuffer width is stored as expected,