pica: upload shared shader code to both unit
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2 changed files with 45 additions and 26 deletions
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@ -202,7 +202,14 @@ struct PipelineRegs {
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/// Number of input attributes to the vertex shader minus 1
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BitField<0, 4, u32> max_input_attrib_index;
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INSERT_PADDING_WORDS(2);
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INSERT_PADDING_WORDS(1);
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// The shader unit 3, which can be used for both vertex and geometry shader, gets its
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// configuration depending on this register. If this is not set, unit 3 will share some
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// configuration with other units. It is known that program code and swizzle pattern uploaded
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// via regs.vs will be also uploaded to unit 3 if this is not set. Although very likely, it is
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// still unclear whether uniforms and other configuration can be also shared.
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BitField<0, 1, u32> gs_unit_exclusive_configuration;
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enum class GPUMode : u32 {
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Drawing = 0,
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