Sources: Run clang-format on everything.
This commit is contained in:
Emmanuel Gil Peyrot
parent
fe948af095
commit
dc8479928c
386 changed files with 19560 additions and 18080 deletions
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@ -12,15 +12,15 @@
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#include "common/microprofile.h"
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#include "common/vector_math.h"
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#include "core/settings.h"
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#include "core/memory.h"
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#include "core/core_timing.h"
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#include "core/memory.h"
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#include "core/settings.h"
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#include "core/hle/service/gsp_gpu.h"
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#include "core/hle/service/hid/hid.h"
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#include "core/hw/hw.h"
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#include "core/hw/gpu.h"
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#include "core/hw/hw.h"
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#include "core/tracer/recorder.h"
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@ -32,7 +32,6 @@
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#include "video_core/debug_utils/debug_utils.h"
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namespace GPU {
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Regs g_regs;
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@ -49,7 +48,7 @@ static u64 frame_count;
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static bool last_skip_frame;
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template <typename T>
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inline void Read(T &var, const u32 raw_addr) {
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inline void Read(T& var, const u32 raw_addr) {
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u32 addr = raw_addr - HW::VADDR_GPU;
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u32 index = addr / 4;
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@ -105,8 +104,7 @@ inline void Write(u32 addr, const T data) {
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// Memory fills are triggered once the fill value is written.
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case GPU_REG_INDEX_WORKAROUND(memory_fill_config[0].trigger, 0x00004 + 0x3):
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case GPU_REG_INDEX_WORKAROUND(memory_fill_config[1].trigger, 0x00008 + 0x3):
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{
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case GPU_REG_INDEX_WORKAROUND(memory_fill_config[1].trigger, 0x00008 + 0x3): {
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const bool is_second_filler = (index != GPU_REG_INDEX(memory_fill_config[0].trigger));
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auto& config = g_regs.memory_fill_config[is_second_filler];
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@ -125,7 +123,9 @@ inline void Write(u32 addr, const T data) {
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// regions that were between surfaces or within the touching
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// ones for cpu to manually fill here.
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if (!VideoCore::g_renderer->Rasterizer()->AccelerateFill(config)) {
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Memory::RasterizerFlushAndInvalidateRegion(config.GetStartAddress(), config.GetEndAddress() - config.GetStartAddress());
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Memory::RasterizerFlushAndInvalidateRegion(config.GetStartAddress(),
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config.GetEndAddress() -
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config.GetStartAddress());
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if (config.fill_24bit) {
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// fill with 24-bit values
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@ -150,7 +150,8 @@ inline void Write(u32 addr, const T data) {
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}
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}
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LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(), config.GetEndAddress());
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LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(),
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config.GetEndAddress());
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if (!is_second_filler) {
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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@ -167,15 +168,15 @@ inline void Write(u32 addr, const T data) {
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break;
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}
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case GPU_REG_INDEX(display_transfer_config.trigger):
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{
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case GPU_REG_INDEX(display_transfer_config.trigger): {
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MICROPROFILE_SCOPE(GPU_DisplayTransfer);
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const auto& config = g_regs.display_transfer_config;
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if (config.trigger & 1) {
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if (Pica::g_debug_context)
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Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::IncomingDisplayTransfer, nullptr);
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Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::IncomingDisplayTransfer,
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nullptr);
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if (!VideoCore::g_renderer->Rasterizer()->AccelerateDisplayTransfer(config)) {
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u8* src_pointer = Memory::GetPhysicalPointer(config.GetPhysicalInputAddress());
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@ -187,17 +188,23 @@ inline void Write(u32 addr, const T data) {
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u32 output_width = config.texture_copy.output_width * 16;
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u32 output_gap = config.texture_copy.output_gap * 16;
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size_t contiguous_input_size = config.texture_copy.size / input_width * (input_width + input_gap);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(), static_cast<u32>(contiguous_input_size));
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size_t contiguous_input_size =
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config.texture_copy.size / input_width * (input_width + input_gap);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(),
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static_cast<u32>(contiguous_input_size));
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size_t contiguous_output_size = config.texture_copy.size / output_width * (output_width + output_gap);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(), static_cast<u32>(contiguous_output_size));
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size_t contiguous_output_size =
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config.texture_copy.size / output_width * (output_width + output_gap);
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Memory::RasterizerFlushAndInvalidateRegion(
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config.GetPhysicalOutputAddress(),
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static_cast<u32>(contiguous_output_size));
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u32 remaining_size = config.texture_copy.size;
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u32 remaining_input = input_width;
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u32 remaining_output = output_width;
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while (remaining_size > 0) {
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u32 copy_size = std::min({ remaining_input, remaining_output, remaining_size });
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u32 copy_size =
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std::min({remaining_input, remaining_output, remaining_size});
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std::memcpy(dst_pointer, src_pointer, copy_size);
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src_pointer += copy_size;
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@ -217,10 +224,11 @@ inline void Write(u32 addr, const T data) {
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}
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}
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LOG_TRACE(HW_GPU, "TextureCopy: 0x%X bytes from 0x%08X(%u+%u)-> 0x%08X(%u+%u), flags 0x%08X",
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config.texture_copy.size,
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config.GetPhysicalInputAddress(), input_width, input_gap,
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config.GetPhysicalOutputAddress(), output_width, output_gap,
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LOG_TRACE(
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HW_GPU,
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"TextureCopy: 0x%X bytes from 0x%08X(%u+%u)-> 0x%08X(%u+%u), flags 0x%08X",
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config.texture_copy.size, config.GetPhysicalInputAddress(), input_width,
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input_gap, config.GetPhysicalOutputAddress(), output_width, output_gap,
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config.flags);
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF);
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@ -228,7 +236,8 @@ inline void Write(u32 addr, const T data) {
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}
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if (config.scaling > config.ScaleXY) {
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LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u", config.scaling.Value());
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LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u",
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config.scaling.Value());
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UNIMPLEMENTED();
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break;
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}
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@ -245,11 +254,14 @@ inline void Write(u32 addr, const T data) {
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u32 output_width = config.output_width >> horizontal_scale;
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u32 output_height = config.output_height >> vertical_scale;
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u32 input_size = config.input_width * config.input_height * GPU::Regs::BytesPerPixel(config.input_format);
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u32 output_size = output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format);
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u32 input_size = config.input_width * config.input_height *
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GPU::Regs::BytesPerPixel(config.input_format);
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u32 output_size =
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output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(), input_size);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(), output_size);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(),
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output_size);
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for (u32 y = 0; y < output_height; ++y) {
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for (u32 x = 0; x < output_width; ++x) {
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@ -278,11 +290,14 @@ inline void Write(u32 addr, const T data) {
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u32 coarse_y = y & ~7;
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u32 stride = output_width * dst_bytes_per_pixel;
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src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) + coarse_y * stride;
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src_offset =
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(input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) +
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coarse_y * stride;
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} else {
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// Both input and output are linear
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src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
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src_offset =
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(input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = (x + y * output_width) * dst_bytes_per_pixel;
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}
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} else {
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@ -291,7 +306,9 @@ inline void Write(u32 addr, const T data) {
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u32 coarse_y = input_y & ~7;
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u32 stride = config.input_width * src_bytes_per_pixel;
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src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) + coarse_y * stride;
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src_offset = VideoCore::GetMortonOffset(input_x, input_y,
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src_bytes_per_pixel) +
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coarse_y * stride;
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dst_offset = (x + y * output_width) * dst_bytes_per_pixel;
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} else {
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// Both input and output are tiled
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@ -301,20 +318,27 @@ inline void Write(u32 addr, const T data) {
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u32 in_coarse_y = input_y & ~7;
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u32 in_stride = config.input_width * src_bytes_per_pixel;
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src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) + in_coarse_y * in_stride;
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dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) + out_coarse_y * out_stride;
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src_offset = VideoCore::GetMortonOffset(input_x, input_y,
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src_bytes_per_pixel) +
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in_coarse_y * in_stride;
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dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) +
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out_coarse_y * out_stride;
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}
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}
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const u8* src_pixel = src_pointer + src_offset;
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src_color = DecodePixel(config.input_format, src_pixel);
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if (config.scaling == config.ScaleX) {
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Math::Vec4<u8> pixel = DecodePixel(config.input_format, src_pixel + src_bytes_per_pixel);
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Math::Vec4<u8> pixel =
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DecodePixel(config.input_format, src_pixel + src_bytes_per_pixel);
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src_color = ((src_color + pixel) / 2).Cast<u8>();
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} else if (config.scaling == config.ScaleXY) {
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Math::Vec4<u8> pixel1 = DecodePixel(config.input_format, src_pixel + 1 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel2 = DecodePixel(config.input_format, src_pixel + 2 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel3 = DecodePixel(config.input_format, src_pixel + 3 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel1 = DecodePixel(
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config.input_format, src_pixel + 1 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel2 = DecodePixel(
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config.input_format, src_pixel + 2 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel3 = DecodePixel(
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config.input_format, src_pixel + 3 * src_bytes_per_pixel);
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src_color = (((src_color + pixel1) + (pixel2 + pixel3)) / 4).Cast<u8>();
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}
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@ -341,17 +365,20 @@ inline void Write(u32 addr, const T data) {
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break;
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default:
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LOG_ERROR(HW_GPU, "Unknown destination framebuffer format %x", config.output_format.Value());
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LOG_ERROR(HW_GPU, "Unknown destination framebuffer format %x",
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config.output_format.Value());
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break;
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}
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}
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}
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LOG_TRACE(HW_GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%ux%u)-> 0x%08x(%ux%u), dst format %x, flags 0x%08X",
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config.output_height * output_width * GPU::Regs::BytesPerPixel(config.output_format),
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config.GetPhysicalInputAddress(), config.input_width.Value(), config.input_height.Value(),
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config.GetPhysicalOutputAddress(), output_width, output_height,
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config.output_format.Value(), config.flags);
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LOG_TRACE(HW_GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%ux%u)-> "
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"0x%08x(%ux%u), dst format %x, flags 0x%08X",
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config.output_height * output_width *
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GPU::Regs::BytesPerPixel(config.output_format),
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config.GetPhysicalInputAddress(), config.input_width.Value(),
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config.input_height.Value(), config.GetPhysicalOutputAddress(),
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output_width, output_height, config.output_format.Value(), config.flags);
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}
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g_regs.display_transfer_config.trigger = 0;
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@ -361,17 +388,16 @@ inline void Write(u32 addr, const T data) {
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}
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// Seems like writing to this register triggers processing
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case GPU_REG_INDEX(command_processor_config.trigger):
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{
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case GPU_REG_INDEX(command_processor_config.trigger): {
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const auto& config = g_regs.command_processor_config;
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if (config.trigger & 1)
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{
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if (config.trigger & 1) {
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MICROPROFILE_SCOPE(GPU_CmdlistProcessing);
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u32* buffer = (u32*)Memory::GetPhysicalPointer(config.GetPhysicalAddress());
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if (Pica::g_debug_context && Pica::g_debug_context->recorder) {
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Pica::g_debug_context->recorder->MemoryAccessed((u8*)buffer, config.size * sizeof(u32), config.GetPhysicalAddress());
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Pica::g_debug_context->recorder->MemoryAccessed(
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(u8*)buffer, config.size * sizeof(u32), config.GetPhysicalAddress());
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}
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Pica::CommandProcessor::ProcessCommandList(buffer, config.size);
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@ -389,16 +415,17 @@ inline void Write(u32 addr, const T data) {
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// This is happening *after* handling the write to make sure we properly catch all memory reads.
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if (Pica::g_debug_context && Pica::g_debug_context->recorder) {
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// addr + GPU VBase - IO VBase + IO PBase
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Pica::g_debug_context->recorder->RegisterWritten<T>(addr + 0x1EF00000 - 0x1EC00000 + 0x10100000, data);
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Pica::g_debug_context->recorder->RegisterWritten<T>(
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addr + 0x1EF00000 - 0x1EC00000 + 0x10100000, data);
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}
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}
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// Explicitly instantiate template functions because we aren't defining this in the header:
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template void Read<u64>(u64 &var, const u32 addr);
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template void Read<u32>(u32 &var, const u32 addr);
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template void Read<u16>(u16 &var, const u32 addr);
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template void Read<u8>(u8 &var, const u32 addr);
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template void Read<u64>(u64& var, const u32 addr);
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template void Read<u32>(u32& var, const u32 addr);
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template void Read<u16>(u16& var, const u32 addr);
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template void Read<u8>(u8& var, const u32 addr);
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template void Write<u64>(u32 addr, const u64 data);
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template void Write<u32>(u32 addr, const u32 data);
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@ -417,8 +444,9 @@ static void VBlankCallback(u64 userdata, int cycles_late) {
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// - If frameskip == 0 (disabled), always swap buffers
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// - If frameskip == 1, swap buffers every other frame (starting from the first frame)
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// - If frameskip > 1, swap buffers every frameskip^n frames (starting from the second frame)
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if ((((Settings::values.frame_skip != 1) ^ last_skip_frame) && last_skip_frame != g_skip_frame) ||
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Settings::values.frame_skip == 0) {
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if ((((Settings::values.frame_skip != 1) ^ last_skip_frame) &&
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last_skip_frame != g_skip_frame) ||
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Settings::values.frame_skip == 0) {
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VideoCore::g_renderer->SwapBuffers();
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}
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@ -448,12 +476,12 @@ void Init() {
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// .. or at least these are the ones used by system applets.
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// There's probably a smarter way to come up with addresses
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// like this which does not require hardcoding.
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framebuffer_top.address_left1 = 0x181E6000;
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framebuffer_top.address_left2 = 0x1822C800;
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framebuffer_top.address_left1 = 0x181E6000;
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framebuffer_top.address_left2 = 0x1822C800;
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framebuffer_top.address_right1 = 0x18273000;
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framebuffer_top.address_right2 = 0x182B9800;
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framebuffer_sub.address_left1 = 0x1848F000;
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framebuffer_sub.address_left2 = 0x184C7800;
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framebuffer_sub.address_left1 = 0x1848F000;
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framebuffer_sub.address_left2 = 0x184C7800;
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framebuffer_top.width.Assign(240);
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framebuffer_top.height.Assign(400);
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