Import of the watch repository from Pebble

platform/silk/boot/vendor/wscript

@@ -0,0 +1,26 @@
+def configure(conf):
+    conf.env.append_unique('DEFINES', 'STM32F412xG')
+
+def build(bld):
+    stm32_basedir = 'STM32F4xx_DSP_StdPeriph_Lib_V1.7.0RC1/'
+    stm32_srcdirs = [stm32_basedir + subpath for subpath in (
+        '', 'Libraries/STM32F4xx_StdPeriph_Driver/src',
+        'Libraries/CMSIS/CM4/CoreSupport')]
+    stm32_sources = sum(
+        [bld.path.ant_glob('%s/*.c' % d, excl=['**/stm32f4xx_fmc.c'])
+            for d in stm32_srcdirs], [])
+
+    stm32_incpath_base = stm32_basedir + 'Libraries/'
+    stm32_includes = [ stm32_incpath_base + subpath for subpath in (
+        'CMSIS/Include', 'CMSIS/Device/ST/STM32F4xx/Include',
+        'STM32F4xx_StdPeriph_Driver/inc')]
+
+    stm32_includes += ['stm32_conf']
+
+    bld.stlib(source=stm32_sources,
+              cflags='-fno-lto',
+              target='stm32_stdlib',
+              includes=stm32_includes,
+              export_includes=stm32_includes)
+
+# vim:filetype=python