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Import of the watch repository from Pebble

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Matthieu Jeanson 2024-12-12 16:43:03 -08:00 • committed by Katharine Berry
commit 3b92768480
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87
src/fw/mfg/spalding/boot_fpga.c Normal file
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/*
* Copyright 2024 Google LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mfg/spalding/mfg_private.h"
#include "drivers/flash.h"
#include "flash_region/flash_region.h"
#include "mfg/spalding/spalding_boot.fpga.auto.h"
#include "system/logging.h"
#include "util/attributes.h"
#include "util/crc32.h"
#include <inttypes.h>
const uintptr_t BOOT_FPGA_FLASH_ADDR = FLASH_REGION_MFG_INFO_BEGIN + 0x10000;
typedef struct PACKED {
uint16_t fpga_len;
uint16_t fpga_len_complemented;
} BootFPGAHeader;
bool mfg_info_is_boot_fpga_bitstream_written(void) {
BootFPGAHeader expected_fpga_header = { (uint16_t)sizeof s_boot_fpga,
(uint16_t)~sizeof s_boot_fpga };
BootFPGAHeader header;
flash_read_bytes((void *)&header, BOOT_FPGA_FLASH_ADDR, sizeof header);
if (header.fpga_len != expected_fpga_header.fpga_len ||
header.fpga_len_complemented != expected_fpga_header.fpga_len_complemented) {
PBL_LOG(LOG_LEVEL_DEBUG, "Boot FPGA length invalid, needs a rewrite");
// The length doesn't even match, we definitely need to update.
return false;
}
// Just because the length is the same that doesn't mean we don't need to update the FPGA
// image. Compare CRCs to see if the new FPGA image is different.
uint32_t expected_crc = crc32(CRC32_INIT, s_boot_fpga, sizeof(s_boot_fpga));
uint32_t stored_crc = flash_crc32(
BOOT_FPGA_FLASH_ADDR + sizeof(BootFPGAHeader), sizeof(s_boot_fpga));
PBL_LOG(LOG_LEVEL_DEBUG, "Comparing boot FPGA CRCs, expected 0x%"PRIx32" found 0x%"PRIx32,
expected_crc, stored_crc);
return expected_crc == stored_crc;
}
void mfg_info_write_boot_fpga_bitstream(void) {
// Store the bootloader FPGA in the MFG info flash region so that the
// bootloader can find it.
_Static_assert(sizeof s_boot_fpga < 1<<16, "FPGA bitstream too big");
BootFPGAHeader fpga_header = { (uint16_t)sizeof s_boot_fpga,
(uint16_t)~sizeof s_boot_fpga };
// I have no idea why but clang really hates this assert
//
// ../../src/fw/mfg/spalding/boot_fpga.c:50:7: error: static_assert expression is not an
// integral constant expression
// (BOOT_FPGA_FLASH_ADDR + sizeof(BootFPGAHeader) + sizeof(s_boot_fpga))
// ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#if !__clang__
_Static_assert(
(BOOT_FPGA_FLASH_ADDR + sizeof(BootFPGAHeader) + sizeof(s_boot_fpga))
< FLASH_REGION_MFG_INFO_END,
"FPGA bitstream will overflow FLASH_REGION_MFG_INFO!");
#endif
flash_write_bytes((const uint8_t *)&fpga_header,
BOOT_FPGA_FLASH_ADDR, sizeof fpga_header);
flash_write_bytes((const uint8_t *)s_boot_fpga,
BOOT_FPGA_FLASH_ADDR + sizeof fpga_header,
sizeof s_boot_fpga);
}

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src/fw/mfg/spalding/mfg_info.c Normal file
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/*
* Copyright 2024 Google LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mfg/mfg_info.h"
#include "drivers/flash.h"
#include "flash_region/flash_region.h"
#include "mfg/mfg_serials.h"
#include "mfg/spalding/mfg_private.h"
#include "system/logging.h"
//! Used to version this struct if we have to add additional fields in the future.
#define CURRENT_DATA_VERSION 3
typedef struct {
uint32_t data_version;
uint32_t color;
uint32_t rtc_freq;
char model[MFG_INFO_MODEL_STRING_LENGTH]; //!< Null terminated model string
int8_t disp_offset_x;
int8_t disp_offset_y;
} MfgData;
static void prv_update_struct(const MfgData *data) {
flash_erase_subsector_blocking(FLASH_REGION_MFG_INFO_BEGIN);
flash_write_bytes((const uint8_t*) data, FLASH_REGION_MFG_INFO_BEGIN, sizeof(*data));
mfg_info_write_boot_fpga_bitstream();
}
static MfgData prv_fetch_struct(void) {
MfgData result;
flash_read_bytes((uint8_t*) &result, FLASH_REGION_MFG_INFO_BEGIN, sizeof(result));
switch (result.data_version) {
case CURRENT_DATA_VERSION:
// Our data is valid. Fall through.
break;
case 2:
result.data_version = CURRENT_DATA_VERSION;
result.disp_offset_x = 0;
result.disp_offset_y = 0;
break;
case 1:
// Our data is out of date. We need to do a conversion to populate the new model field.
result.data_version = CURRENT_DATA_VERSION;
result.model[0] = '\0';
result.disp_offset_x = 0;
result.disp_offset_y = 0;
break;
default:
// No data present, just return an initialized struct with default values.
return (MfgData) { .data_version = CURRENT_DATA_VERSION };
}
return result;
}
WatchInfoColor mfg_info_get_watch_color(void) {
return prv_fetch_struct().color;
}
void mfg_info_set_watch_color(WatchInfoColor color) {
MfgData data = prv_fetch_struct();
data.color = color;
prv_update_struct(&data);
}
GPoint mfg_info_get_disp_offsets(void) {
return (GPoint) {
.x = prv_fetch_struct().disp_offset_x,
.y = prv_fetch_struct().disp_offset_y
};
}
void mfg_info_set_disp_offsets(GPoint p) {
MfgData data = prv_fetch_struct();
data.disp_offset_x = p.x;
data.disp_offset_y = p.y;
prv_update_struct(&data);
}
uint32_t mfg_info_get_rtc_freq(void) {
return prv_fetch_struct().rtc_freq;
}
void mfg_info_set_rtc_freq(uint32_t rtc_freq) {
MfgData data = prv_fetch_struct();
data.rtc_freq = rtc_freq;
prv_update_struct(&data);
}
void mfg_info_get_model(char* buffer) {
MfgData data = prv_fetch_struct();
strncpy(buffer, data.model, sizeof(data.model));
data.model[MFG_INFO_MODEL_STRING_LENGTH - 1] = '\0'; // Just in case
}
void mfg_info_set_model(const char* model) {
MfgData data = prv_fetch_struct();
strncpy(data.model, model, sizeof(data.model));
data.model[MFG_INFO_MODEL_STRING_LENGTH - 1] = '\0';
prv_update_struct(&data);
}
void mfg_info_update_constant_data(void) {
if (mfg_info_is_boot_fpga_bitstream_written()) {
PBL_LOG(LOG_LEVEL_INFO, "Boot FPGA bitstream already in flash.");
} else {
PBL_LOG(LOG_LEVEL_INFO, "Writing boot FPGA bitstream to flash...");
// Read the mfg data and write it back again. The prv_update_struct function write in a fresh
// copy of the FPGA image as a side effect.
MfgData data = prv_fetch_struct();
prv_update_struct(&data);
}
}

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src/fw/mfg/spalding/mfg_private.h Normal file
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/*
* Copyright 2024 Google LLC
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#pragma once
#include <stdbool.h>
void mfg_info_write_boot_fpga_bitstream(void);
bool mfg_info_is_boot_fpga_bitstream_written(void);