Import of the watch repository from Pebble

This commit is contained in:
Matthieu Jeanson 2024-12-12 16:43:03 -08:00 committed by Katharine Berry
commit 3b92768480
10334 changed files with 2564465 additions and 0 deletions

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/* Copyright 2014-2016 Samsung Electronics Co., Ltd.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef ASM_ARM_H
#define ASM_ARM_H
/*
* mov syscall_no (%r0) -> %r7
* svc #0
*/
#define SYSCALL_0 \
push {r4-r12, lr}; \
\
mov r7, r0; \
\
svc #0; \
\
pop {r4-r12, pc};
/*
* mov syscall_no (%r0) -> %r7
* mov arg1 (%r1) -> %r0
* svc #0
*/
#define SYSCALL_1 \
push {r4-r12, lr}; \
\
mov r7, r0; \
mov r0, r1; \
\
svc #0; \
\
pop {r4-r12, pc};
/*
* mov syscall_no (%r0) -> %r7
* mov arg1 (%r1) -> %r0
* mov arg2 (%r2) -> %r1
* svc #0
*/
#define SYSCALL_2 \
push {r4-r12, lr}; \
\
mov r7, r0; \
mov r0, r1; \
mov r1, r2; \
\
svc #0; \
\
pop {r4-r12, pc};
/*
* mov syscall_no (%r0) -> %r7
* mov arg1 (%r1) -> %r0
* mov arg2 (%r2) -> %r1
* mov arg3 (%r3) -> %r2
* svc #0
*/
#define SYSCALL_3 \
push {r4-r12, lr}; \
\
mov r7, r0; \
mov r0, r1; \
mov r1, r2; \
mov r2, r3; \
\
svc #0; \
\
pop {r4-r12, pc};
/*
* ldr argc ([sp + 0x0]) -> r0
* add argv (sp + 0x4) -> r1
*
* bl main
*
* bl exit
*
* infinite loop
*/
#define _START \
ldr r0, [sp, #0]; \
add r1, sp, #4; \
bl main; \
\
bl exit; \
1: \
b 1b
/**
* If hard-float mode:
* store s16-s31 vfp registers to buffer, pointed with r0 register,
* and increase the register on size of stored data.
*/
#ifdef __TARGET_HOST_ARMv7_HARD_FLOAT
# define _STORE_VFP_S16_S31_IF_HARD_FLOAT \
vstm r0!, {s16 - s31};
# define _LOAD_VFP_S16_S31_IF_HARD_FLOAT \
vldm r0!, {s16 - s31};
#else /* !__TARGET_HOST_ARMv7_HARD_FLOAT */
# define _STORE_VFP_S16_S31_IF_HARD_FLOAT
# define _LOAD_VFP_S16_S31_IF_HARD_FLOAT
#endif /* __TARGET_HOST_ARMv7_HARD_FLOAT */
/*
* setjmp
*
* According to procedure call standard for the ARM architecture, the following
* registers are callee-saved, and so need to be stored in context:
* - r4 - r11
* - sp
* - s16 - s31
*
* Also, we should store:
* - lr
*
* stmia {r4-r11, sp, lr} -> jmp_buf_0 (r0)!
*
* If hard-float build
* vstm {s16-s31} -> jmp_buf_32 (r0)!
*
* mov r0, #0
*
* bx lr
*/
#define _SETJMP \
stmia r0!, {r4 - r11, sp, lr}; \
\
_STORE_VFP_S16_S31_IF_HARD_FLOAT \
\
mov r0, #0; \
\
bx lr;
/*
* longjmp
*
* See also:
* _SETJMP
*
* ldmia jmp_buf_0 (r0)! -> {r4-r11, sp, lr}
*
* If hard-float build
* vldm jmp_buf_32 (r0)! -> {s16-s31}
*
* mov r1 -> r0
* cmp r0, #0
* bne 1f
* mov #1 -> r0
* 1:
*
* bx lr
*/
#define _LONGJMP \
ldmia r0!, {r4 - r11, sp, lr}; \
\
_LOAD_VFP_S16_S31_IF_HARD_FLOAT \
\
mov r0, r1; \
cmp r0, #0; \
bne 1f; \
mov r0, #1; \
1: \
\
bx lr;
#endif /* !ASM_ARM_H */

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/* Copyright 2014-2015 Samsung Electronics Co., Ltd.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef ASM_X86_H
#define ASM_X86_H
/*
* mov syscall_no -> %eax
* int $0x80
* mov %eax -> ret
*/
#define SYSCALL_0 \
push %edi; \
push %esi; \
push %ebx; \
mov 0x10 (%esp), %eax; \
int $0x80; \
pop %ebx; \
pop %esi; \
pop %edi; \
ret;
/*
* mov syscall_no -> %eax
* mov arg1 -> %ebx
* int $0x80
* mov %eax -> ret
*/
#define SYSCALL_1 \
push %edi; \
push %esi; \
push %ebx; \
mov 0x10 (%esp), %eax; \
mov 0x14 (%esp), %ebx; \
int $0x80; \
pop %ebx; \
pop %esi; \
pop %edi; \
ret;
/*
* mov syscall_no -> %eax
* mov arg1 -> %ebx
* mov arg2 -> %ecx
* int $0x80
* mov %eax -> ret
*/
#define SYSCALL_2 \
push %edi; \
push %esi; \
push %ebx; \
mov 0x10 (%esp), %eax; \
mov 0x14 (%esp), %ebx; \
mov 0x18 (%esp), %ecx; \
int $0x80; \
pop %ebx; \
pop %esi; \
pop %edi; \
ret;
/*
* mov syscall_no -> %eax
* mov arg1 -> %ebx
* mov arg2 -> %ecx
* mov arg3 -> %edx
* int $0x80
* mov %eax -> ret
*/
#define SYSCALL_3 \
push %edi; \
push %esi; \
push %ebx; \
mov 0x10 (%esp), %eax; \
mov 0x14 (%esp), %ebx; \
mov 0x18 (%esp), %ecx; \
mov 0x1c (%esp), %edx; \
int $0x80; \
pop %ebx; \
pop %esi; \
pop %edi; \
ret;
/*
* push argv (%esp + 4)
* push argc ([%esp + 0x4])
*
* call main
*
* push main_ret (%eax)
* call exit
*
* infinite loop
*/
#define _START \
mov %esp, %eax; \
add $4, %eax; \
push %eax; \
mov 0x4 (%esp), %eax; \
push %eax; \
\
call main; \
\
push %eax; \
call exit; \
\
1: \
jmp 1b
/*
* setjmp
*
* According to x86_32 System V ABI, the following registers are
* callee-saved, and so need to be stored in context:
* - %ebx
* - %esp
* - %ebp
* - %esi
* - %edi
* - x87 control word
*
* Also, we should store:
* - return address (to jump to upon longjmp)
*
* mov return_address ([%esp]) -> %eax
*
* mov env ([%esp + 0x4]) -> %edx
*
* mov %ebx -> jmp_buf_0 ([%edx + 0x0])
* mov %esp -> jmp_buf_4 ([%edx + 0x4])
* mov %ebp -> jmp_buf_8 ([%edx + 0x8])
* mov %esi -> jmp_buf_12 ([%edx + 0xc])
* mov %edi -> jmp_buf_16 ([%edx + 0x10])
* mov %eax -> jmp_buf_20 ([%edx + 0x14])
* fnstcw -> jmp_buf_24 ([%edx + 0x18])
*
* ret
*/
#define _SETJMP \
mov (%esp), %eax; \
mov 0x4 (%esp), %edx; \
\
mov %ebx, 0x00 (%edx); \
mov %esp, 0x04 (%edx); \
mov %ebp, 0x08 (%edx); \
mov %esi, 0x0c (%edx); \
mov %edi, 0x10 (%edx); \
mov %eax, 0x14 (%edx); \
fnstcw 0x18 (%edx); \
\
xor %eax, %eax; \
\
ret
/*
* longjmp
*
* See also:
* _SETJMP
*
* mov env ([%esp + 0x4]) -> %edx
* mov val ([%esp + 0x8]) -> %eax
*
* mov jmp_buf_0 ([%edx + 0x0]) -> %ebx
* mov jmp_buf_4 ([%edx + 0x8]) -> %esp
* mov jmp_buf_8 ([%edx + 0x10]) -> %ebp
* mov jmp_buf_12 ([%edx + 0x18]) -> %esi
* mov jmp_buf_16 ([%edx + 0x20]) -> %edi
* mov jmp_buf_20 ([%edx + 0x28]) -> %ecx
* fldcw jmp_buf_24 ([%edx + 0x30])
*
* mov return_address (%ecx) -> ([%esp])
*
* cmp (%eax), 0x0
* jnz 1f
* xor %eax, %eax
* 1:
*
* ret
*/
#define _LONGJMP \
mov 0x4 (%esp), %edx; \
mov 0x8 (%esp), %eax; \
\
mov 0x0 (%edx), %ebx; \
mov 0x4 (%edx), %esp; \
mov 0x8 (%edx), %ebp; \
mov 0xc (%edx), %esi; \
mov 0x10 (%edx), %edi; \
mov 0x14 (%edx), %ecx; \
fldcw 0x18 (%edx); \
\
mov %ecx, (%esp); \
\
test %eax, %eax; \
jnz 1f; \
xor %eax, %eax; \
1: \
\
ret
#endif /* !ASM_X86_H */

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/* Copyright 2014-2015 Samsung Electronics Co., Ltd.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef ASM_X64_H
#define ASM_X64_H
/*
* mov syscall_no (%rdi) -> %rax
* syscall
*/
#define SYSCALL_0 \
mov %rdi, %rax; \
syscall; \
ret;
/*
* mov syscall_no (%rdi) -> %rax
* mov arg1 (%rsi) -> %rdi
* syscall
*/
#define SYSCALL_1 \
mov %rdi, %rax; \
mov %rsi, %rdi; \
syscall; \
ret;
/*
* mov syscall_no (%rdi) -> %rax
* mov arg1 (%rsi) -> %rdi
* mov arg2 (%rdx) -> %rsi
* syscall
*/
#define SYSCALL_2 \
mov %rdi, %rax; \
mov %rsi, %rdi; \
mov %rdx, %rsi; \
syscall; \
ret;
/*
* mov syscall_no (%rdi) -> %rax
* mov arg1 (%rsi) -> %rdi
* mov arg2 (%rdx) -> %rsi
* mov arg3 (%rcx) -> %rdx
* syscall
*/
#define SYSCALL_3 \
mov %rdi, %rax; \
mov %rsi, %rdi; \
mov %rdx, %rsi; \
mov %rcx, %rdx; \
syscall; \
ret;
/*
* mov argc ([%rsp]) -> %rdi
* mov argv (%rsp + 0x8) -> %rsi
*
* call main
*
* mov main_ret (%rax) -> %rdi
* call exit
*
* infinite loop
*/
#define _START \
mov (%rsp), %rdi; \
mov %rsp, %rsi; \
add $8, %rsi; \
callq main; \
\
mov %rax, %rdi; \
callq exit; \
1: \
jmp 1b
/*
* setjmp
*
* According to x86_64 System V ABI, the following registers are
* callee-saved, and so need to be stored in context:
* - %rbp
* - %rbx
* - %r12
* - %r13
* - %r14
* - %r15
* - x87 control word
*
* Also, we should store:
* - %rsp (stack pointer)
* - return address (to jump to upon longjmp)
*
* mov return_address ([%rsp]) -> %rax
*
* mov %rsp -> jmp_buf_0 ([%rdi + 0x0])
* mov %rax -> jmp_buf_8 ([%rdi + 0x8])
* mov %rbp -> jmp_buf_16 ([%rdi + 0x10])
* mov %rbx -> jmp_buf_24 ([%rdi + 0x18])
* mov %r12 -> jmp_buf_32 ([%rdi + 0x20])
* mov %r13 -> jmp_buf_40 ([%rdi + 0x28])
* mov %r14 -> jmp_buf_48 ([%rdi + 0x30])
* mov %r15 -> jmp_buf_56 ([%rdi + 0x38])
* fnstcw -> jmp_buf_64 ([%rdi + 0x40])
*
* ret
*/
#define _SETJMP \
mov (%rsp), %rax; \
\
mov %rsp, 0x00(%rdi); \
mov %rax, 0x08(%rdi); \
mov %rbp, 0x10(%rdi); \
mov %rbx, 0x18(%rdi); \
mov %r12, 0x20(%rdi); \
mov %r13, 0x28(%rdi); \
mov %r14, 0x30(%rdi); \
mov %r15, 0x38(%rdi); \
fnstcw 0x40(%rdi); \
\
xor %rax, %rax; \
\
ret;
/*
* longjmp
*
* See also:
* _SETJMP
*
* mov jmp_buf_0 ([%rdi + 0x0]) -> %rsp
* mov jmp_buf_8 ([%rdi + 0x8]) -> %rax
* mov jmp_buf_16 ([%rdi + 0x10]) -> %rbp
* mov jmp_buf_24 ([%rdi + 0x18]) -> %rbx
* mov jmp_buf_32 ([%rdi + 0x20]) -> %r12
* mov jmp_buf_40 ([%rdi + 0x28]) -> %r13
* mov jmp_buf_48 ([%rdi + 0x30]) -> %r14
* mov jmp_buf_56 ([%rdi + 0x38]) -> %r15
* fldcw jmp_buf_64 ([%rdi + 0x40])
*
* mov return_address (%rax) -> ([%rsp])
*
* mov val (%rsi) -> %rax
*
* test (%rax), (%rax)
* jnz 1f
* mov $1, %rax
* 1:
*
* ret
*/
#define _LONGJMP \
mov 0x00(%rdi), %rsp; \
mov 0x08(%rdi), %rax; \
mov 0x10(%rdi), %rbp; \
mov 0x18(%rdi), %rbx; \
mov 0x20(%rdi), %r12; \
mov 0x28(%rdi), %r13; \
mov 0x30(%rdi), %r14; \
mov 0x38(%rdi), %r15; \
fldcw 0x40(%rdi); \
\
mov %rax, (%rsp); \
\
mov %rsi, %rax; \
\
test %rax, %rax; \
jnz 1f; \
mov $1, %rax; \
1: \
\
ret
#endif /* !ASM_X64_H */