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shader_recompiler: Better branch detection + more opcodes
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parent
f624f7749c
commit
02a50265f8
31 changed files with 772 additions and 120 deletions
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@ -206,9 +206,12 @@ void PatchBufferInstruction(IR::Block& block, IR::Inst& inst, Info& info,
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const u32 dword_offset = inst_info.inst_offset.Value() / sizeof(u32);
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IR::U32 address = ir.Imm32(dword_offset);
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if (inst_info.index_enable && inst_info.offset_enable) {
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UNREACHABLE();
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const IR::U32 offset{ir.CompositeExtract(inst.Arg(1), 0)};
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const IR::U32 index{ir.CompositeExtract(inst.Arg(1), 1)};
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address = ir.IAdd(ir.IMul(index, ir.Imm32(dword_stride)), address);
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address = ir.IAdd(address, ir.ShiftRightLogical(offset, ir.Imm32(2)));
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} else if (inst_info.index_enable) {
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IR::U32 index{inst.Arg(1)};
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const IR::U32 index{inst.Arg(1)};
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address = ir.IAdd(ir.IMul(index, ir.Imm32(dword_stride)), address);
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} else if (inst_info.offset_enable) {
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const IR::U32 offset{inst.Arg(1)};
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@ -216,6 +219,17 @@ void PatchBufferInstruction(IR::Block& block, IR::Inst& inst, Info& info,
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inst.SetArg(1, address);
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}
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IR::Value PatchCubeCoord(IR::IREmitter& ir, const IR::Value& s, const IR::Value& t,
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const IR::Value& z) {
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// We need to fix x and y coordinate,
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// because the s and t coordinate will be scaled and plus 1.5 by v_madak_f32.
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// We already force the scale value to be 1.0 when handling v_cubema_f32,
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// here we subtract 1.5 to recover the original value.
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const IR::Value x = ir.FPSub(IR::F32{s}, ir.Imm32(1.5f));
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const IR::Value y = ir.FPSub(IR::F32{t}, ir.Imm32(1.5f));
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return ir.CompositeConstruct(x, y, z);
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}
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void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descriptors& descriptors) {
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IR::Inst* producer = inst.Arg(0).InstRecursive();
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ASSERT(producer->GetOpcode() == IR::Opcode::CompositeConstructU32x2);
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@ -256,8 +270,9 @@ void PatchImageInstruction(IR::Block& block, IR::Inst& inst, Info& info, Descrip
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return {ir.CompositeConstruct(body->Arg(0), body->Arg(1)), body->Arg(2)};
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case AmdGpu::ImageType::Color2DArray:
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case AmdGpu::ImageType::Color3D:
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case AmdGpu::ImageType::Cube:
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return {ir.CompositeConstruct(body->Arg(0), body->Arg(1), body->Arg(2)), body->Arg(3)};
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case AmdGpu::ImageType::Cube:
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return {PatchCubeCoord(ir, body->Arg(0), body->Arg(1), body->Arg(2)), body->Arg(3)};
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default:
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UNREACHABLE();
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}
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@ -276,6 +291,7 @@ void ResourceTrackingPass(IR::Program& program) {
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// Most of the time it is float so that is the default. This pass detects float buffer loads
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// combined with bitcasts and patches them to be integer loads.
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for (IR::Block* const block : program.post_order_blocks) {
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break;
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for (IR::Inst& inst : block->Instructions()) {
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if (inst.GetOpcode() != IR::Opcode::BitCastU32F32) {
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continue;
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