Mirrors/shadPS4
1
0
Fork 0
mirror of https://github.com/shadps4-emu/shadPS4.git synced 2025-05-23 20:05:01 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 7

fix: lower UBO max size to account buffer cache offset (#2388)

Browse source 
* fix: lower UBO max size to account buffer cache offset

* review comments

* remove UBO size from spec and always set it to max on shader side
This commit is contained in:
psucien 2025-02-09 22:03:20 +01:00 • committed by GitHub
parent 34a4f6e60e
commit 04fe3a79b9
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
14 changed files with 61 additions and 40 deletions
Download patch file Download diff file Expand all files Collapse all files

4
src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
View file

@ -633,8 +633,8 @@ void EmitContext::DefineBuffers() {
for (const auto& desc : info.buffers) {
const auto sharp = desc.GetSharp(info);
const bool is_storage = desc.IsStorage(sharp);
const u32 array_size = sharp.NumDwords() != 0 ? sharp.NumDwords() : MaxUboDwords;
const bool is_storage = desc.IsStorage(sharp, profile);
const u32 array_size = profile.max_ubo_size >> 2;
const auto* data_types = True(desc.used_types & IR::Type::F32) ? &F32 : &U32;
const Id data_type = (*data_types)[1];
const Id record_array_type{is_storage ? TypeRuntimeArray(data_type)

8
src/shader_recompiler/info.h
View file

@ -17,6 +17,7 @@
#include "shader_recompiler/ir/reg.h"
#include "shader_recompiler/ir/type.h"
#include "shader_recompiler/params.h"
#include "shader_recompiler/profile.h"
#include "shader_recompiler/runtime_info.h"
#include "video_core/amdgpu/liverpool.h"
#include "video_core/amdgpu/resource.h"
@ -24,8 +25,6 @@
namespace Shader {
static constexpr size_t NumUserDataRegs = 16;
static constexpr size_t MaxUboSize = 65536;
static constexpr size_t MaxUboDwords = MaxUboSize >> 2;
enum class TextureType : u32 {
Color1D,
@ -50,8 +49,9 @@ struct BufferResource {
bool is_written{};
bool is_formatted{};
[[nodiscard]] bool IsStorage(const AmdGpu::Buffer& buffer) const noexcept {
return buffer.GetSize() > MaxUboSize || is_written || is_gds_buffer;
[[nodiscard]] bool IsStorage(const AmdGpu::Buffer& buffer,
const Profile& profile) const noexcept {
return buffer.GetSize() > profile.max_ubo_size || is_written || is_gds_buffer;
}
[[nodiscard]] constexpr AmdGpu::Buffer GetSharp(const Info& info) const noexcept;

1
src/shader_recompiler/profile.h
View file

@ -30,6 +30,7 @@ struct Profile {
bool needs_manual_interpolation{};
bool needs_lds_barriers{};
u64 min_ssbo_alignment{};
u64 max_ubo_size{};
u32 max_viewport_width{};
u32 max_viewport_height{};
u32 max_shared_memory_size{};

15
src/shader_recompiler/specialization.h
View file

@ -27,7 +27,6 @@ struct BufferSpecialization {
u32 num_format : 4;
u32 index_stride : 2;
u32 element_size : 2;
u32 size = 0;
AmdGpu::CompMapping dst_select{};
AmdGpu::NumberConversion num_conversion{};
@ -38,8 +37,7 @@ struct BufferSpecialization {
(data_format == other.data_format && num_format == other.num_format &&
dst_select == other.dst_select && num_conversion == other.num_conversion)) &&
(!swizzle_enable ||
(index_stride == other.index_stride && element_size == other.element_size)) &&
(size >= other.is_storage || is_storage);
(index_stride == other.index_stride && element_size == other.element_size));
}
};
@ -87,8 +85,8 @@ struct StageSpecialization {
boost::container::small_vector<SamplerSpecialization, 16> samplers;
Backend::Bindings start{};
explicit StageSpecialization(const Info& info_, RuntimeInfo runtime_info_,
const Profile& profile_, Backend::Bindings start_)
StageSpecialization(const Info& info_, RuntimeInfo runtime_info_, const Profile& profile_,
Backend::Bindings start_)
: info{&info_}, runtime_info{runtime_info_}, start{start_} {
fetch_shader_data = Gcn::ParseFetchShader(info_);
if (info_.stage == Stage::Vertex && fetch_shader_data &&
@ -107,9 +105,9 @@ struct StageSpecialization {
binding++;
}
ForEachSharp(binding, buffers, info->buffers,
[](auto& spec, const auto& desc, AmdGpu::Buffer sharp) {
[profile_](auto& spec, const auto& desc, AmdGpu::Buffer sharp) {
spec.stride = sharp.GetStride();
spec.is_storage = desc.IsStorage(sharp);
spec.is_storage = desc.IsStorage(sharp, profile_);
spec.is_formatted = desc.is_formatted;
spec.swizzle_enable = sharp.swizzle_enable;
if (spec.is_formatted) {
@ -122,9 +120,6 @@ struct StageSpecialization {
spec.index_stride = sharp.index_stride;
spec.element_size = sharp.element_size;
}
if (!spec.is_storage) {
spec.size = sharp.GetSize();
}
});
ForEachSharp(binding, images, info->images,
[](auto& spec, const auto& desc, AmdGpu::Image sharp) {