mirror of
https://github.com/shadps4-emu/shadPS4.git
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GPU processor refactoring (#1787)
* coroutine code prettification * asc queues submission refactoring * better asc ring context handling * final touches and review notes * even more simplification for context saving
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af26c945b1
commit
0fd1ab674b
12 changed files with 234 additions and 146 deletions
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@ -142,41 +142,61 @@ void DebugStateImpl::PushQueueDump(QueueDump dump) {
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frame.queues.push_back(std::move(dump));
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}
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void DebugStateImpl::PushRegsDump(uintptr_t base_addr, uintptr_t header_addr,
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const AmdGpu::Liverpool::Regs& regs, bool is_compute) {
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std::scoped_lock lock{frame_dump_list_mutex};
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std::optional<RegDump*> DebugStateImpl::GetRegDump(uintptr_t base_addr, uintptr_t header_addr) {
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const auto it = waiting_reg_dumps.find(header_addr);
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if (it == waiting_reg_dumps.end()) {
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return;
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return std::nullopt;
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}
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auto& frame = *it->second;
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waiting_reg_dumps.erase(it);
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waiting_reg_dumps_dbg.erase(waiting_reg_dumps_dbg.find(header_addr));
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auto& dump = frame.regs[header_addr - base_addr];
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dump.regs = regs;
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if (is_compute) {
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dump.is_compute = true;
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const auto& cs = dump.regs.cs_program;
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dump.cs_data = PipelineComputerProgramDump{
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.cs_program = cs,
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.code = std::vector<u32>{cs.Code().begin(), cs.Code().end()},
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};
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} else {
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for (int i = 0; i < RegDump::MaxShaderStages; i++) {
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if (regs.stage_enable.IsStageEnabled(i)) {
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auto stage = regs.ProgramForStage(i);
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if (stage->address_lo != 0) {
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auto code = stage->Code();
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dump.stages[i] = PipelineShaderProgramDump{
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.user_data = *stage,
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.code = std::vector<u32>{code.begin(), code.end()},
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};
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}
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return &frame.regs[header_addr - base_addr];
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}
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void DebugStateImpl::PushRegsDump(uintptr_t base_addr, uintptr_t header_addr,
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const AmdGpu::Liverpool::Regs& regs) {
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std::scoped_lock lock{frame_dump_list_mutex};
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auto dump = GetRegDump(base_addr, header_addr);
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if (!dump) {
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return;
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}
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(*dump)->regs = regs;
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for (int i = 0; i < RegDump::MaxShaderStages; i++) {
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if ((*dump)->regs.stage_enable.IsStageEnabled(i)) {
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auto stage = (*dump)->regs.ProgramForStage(i);
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if (stage->address_lo != 0) {
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auto code = stage->Code();
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(*dump)->stages[i] = PipelineShaderProgramDump{
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.user_data = *stage,
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.code = std::vector<u32>{code.begin(), code.end()},
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};
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}
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}
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}
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}
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void DebugStateImpl::PushRegsDumpCompute(uintptr_t base_addr, uintptr_t header_addr,
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const CsState& cs_state) {
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std::scoped_lock lock{frame_dump_list_mutex};
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auto dump = GetRegDump(base_addr, header_addr);
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if (!dump) {
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return;
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}
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(*dump)->is_compute = true;
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auto& cs = (*dump)->regs.cs_program;
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cs = cs_state;
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(*dump)->cs_data = PipelineComputerProgramDump{
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.cs_program = cs,
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.code = std::vector<u32>{cs.Code().begin(), cs.Code().end()},
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};
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}
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void DebugStateImpl::CollectShader(const std::string& name, Shader::LogicalStage l_stage,
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vk::ShaderModule module, std::span<const u32> spv,
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std::span<const u32> raw_code, std::span<const u32> patch_spv,
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@ -11,7 +11,6 @@
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#include <queue>
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#include "common/types.h"
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#include "video_core/amdgpu/liverpool.h"
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#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
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#ifdef _WIN32
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@ -204,12 +203,17 @@ public:
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void PushQueueDump(QueueDump dump);
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void PushRegsDump(uintptr_t base_addr, uintptr_t header_addr,
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const AmdGpu::Liverpool::Regs& regs, bool is_compute = false);
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const AmdGpu::Liverpool::Regs& regs);
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using CsState = AmdGpu::Liverpool::ComputeProgram;
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void PushRegsDumpCompute(uintptr_t base_addr, uintptr_t header_addr, const CsState& cs_state);
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void CollectShader(const std::string& name, Shader::LogicalStage l_stage,
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vk::ShaderModule module, std::span<const u32> spv,
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std::span<const u32> raw_code, std::span<const u32> patch_spv,
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bool is_patched);
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private:
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std::optional<RegDump*> GetRegDump(uintptr_t base_addr, uintptr_t header_addr);
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};
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} // namespace DebugStateType
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@ -296,17 +296,12 @@ static_assert(CtxInitSequence400.size() == 0x61);
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// In case if `submitDone` is issued we need to block submissions until GPU idle
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static u32 submission_lock{};
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std::condition_variable cv_lock{};
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static std::mutex m_submission{};
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std::mutex m_submission{};
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static u64 frames_submitted{}; // frame counter
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static bool send_init_packet{true}; // initialize HW state before first game's submit in a frame
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static int sdk_version{0};
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struct AscQueueInfo {
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VAddr map_addr;
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u32* read_addr;
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u32 ring_size_dw;
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};
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static Common::SlotVector<AscQueueInfo> asc_queues{};
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static u32 asc_next_offs_dw[Liverpool::NumComputeRings];
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static constexpr VAddr tessellation_factors_ring_addr = Core::SYSTEM_RESERVED_MAX - 0xFFFFFFF;
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static constexpr u32 tessellation_offchip_buffer_size = 0x800000u;
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@ -506,11 +501,19 @@ void PS4_SYSV_ABI sceGnmDingDong(u32 gnm_vqid, u32 next_offs_dw) {
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}
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auto vqid = gnm_vqid - 1;
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auto& asc_queue = asc_queues[{vqid}];
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const auto* acb_ptr = reinterpret_cast<const u32*>(asc_queue.map_addr + *asc_queue.read_addr);
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const auto acb_size = next_offs_dw ? (next_offs_dw << 2u) - *asc_queue.read_addr
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: (asc_queue.ring_size_dw << 2u) - *asc_queue.read_addr;
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const std::span acb_span{acb_ptr, acb_size >> 2u};
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auto& asc_queue = liverpool->asc_queues[{vqid}];
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const auto& offs_dw = asc_next_offs_dw[vqid];
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if (next_offs_dw < offs_dw) {
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ASSERT_MSG(next_offs_dw == 0, "ACB submission is split at the end of ring buffer");
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}
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const auto* acb_ptr = reinterpret_cast<const u32*>(asc_queue.map_addr) + offs_dw;
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const auto acb_size_dw = (next_offs_dw ? next_offs_dw : asc_queue.ring_size_dw) - offs_dw;
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const std::span acb_span{acb_ptr, acb_size_dw};
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asc_next_offs_dw[vqid] = next_offs_dw;
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if (DebugState.DumpingCurrentFrame()) {
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static auto last_frame_num = -1LL;
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@ -545,9 +548,6 @@ void PS4_SYSV_ABI sceGnmDingDong(u32 gnm_vqid, u32 next_offs_dw) {
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});
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}
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liverpool->SubmitAsc(gnm_vqid, acb_span);
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*asc_queue.read_addr += acb_size;
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*asc_queue.read_addr %= asc_queue.ring_size_dw * 4;
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}
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void PS4_SYSV_ABI sceGnmDingDongForWorkload(u32 gnm_vqid, u32 next_offs_dw, u64 workload_id) {
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@ -1266,12 +1266,16 @@ int PS4_SYSV_ABI sceGnmMapComputeQueue(u32 pipe_id, u32 queue_id, VAddr ring_bas
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return ORBIS_GNM_ERROR_COMPUTEQUEUE_INVALID_READ_PTR_ADDR;
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}
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auto vqid = asc_queues.insert(VAddr(ring_base_addr), read_ptr_addr, ring_size_dw);
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const auto vqid =
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liverpool->asc_queues.insert(VAddr(ring_base_addr), read_ptr_addr, ring_size_dw, pipe_id);
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// We need to offset index as `dingDong` assumes it to be from the range [1..64]
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const auto gnm_vqid = vqid.index + 1;
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LOG_INFO(Lib_GnmDriver, "ASC pipe {} queue {} mapped to vqueue {}", pipe_id, queue_id,
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gnm_vqid);
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const auto& queue = liverpool->asc_queues[vqid];
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*queue.read_addr = 0u;
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return gnm_vqid;
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}
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