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spirv: Flush denormals if possible (#1302)
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parent
56e8ed7833
commit
100036aecf
14 changed files with 130 additions and 98 deletions
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@ -1,7 +1,7 @@
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "shader_recompiler/frontend/translate/translate.h"
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#include "shader_recompiler/ir/ir_emitter.h"
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#include "shader_recompiler/ir/opcodes.h"
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#include "shader_recompiler/ir/program.h"
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#include "shader_recompiler/ir/reg.h"
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@ -11,6 +11,8 @@ namespace Shader::Optimization {
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void RingAccessElimination(const IR::Program& program, const RuntimeInfo& runtime_info,
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Stage stage) {
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auto& info = program.info;
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const auto& ForEachInstruction = [&](auto func) {
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for (IR::Block* block : program.blocks) {
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for (IR::Inst& inst : block->Instructions()) {
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@ -52,6 +54,9 @@ void RingAccessElimination(const IR::Program& program, const RuntimeInfo& runtim
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break;
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}
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case Stage::Geometry: {
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const auto& gs_info = runtime_info.gs_info;
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info.gs_copy_data = Shader::ParseCopyShader(gs_info.vs_copy);
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ForEachInstruction([&](IR::IREmitter& ir, IR::Inst& inst) {
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const auto opcode = inst.GetOpcode();
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switch (opcode) {
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@ -81,12 +86,12 @@ void RingAccessElimination(const IR::Program& program, const RuntimeInfo& runtim
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const auto offset = inst.Flags<IR::BufferInstInfo>().inst_offset.Value();
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const auto data = ir.BitCast<IR::F32>(IR::U32{inst.Arg(2)});
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const auto comp_ofs = runtime_info.gs_info.output_vertices * 4u;
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const auto output_size = comp_ofs * runtime_info.gs_info.out_vertex_data_size;
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const auto comp_ofs = gs_info.output_vertices * 4u;
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const auto output_size = comp_ofs * gs_info.out_vertex_data_size;
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const auto vc_read_ofs = (((offset / comp_ofs) * comp_ofs) % output_size) * 16u;
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const auto& it = runtime_info.gs_info.copy_data.attr_map.find(vc_read_ofs);
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ASSERT(it != runtime_info.gs_info.copy_data.attr_map.cend());
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const auto& it = info.gs_copy_data.attr_map.find(vc_read_ofs);
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ASSERT(it != info.gs_copy_data.attr_map.cend());
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const auto& [attr, comp] = it->second;
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inst.ReplaceOpcode(IR::Opcode::SetAttribute);
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@ -10,20 +10,6 @@
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namespace Shader::IR {
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enum class FpRoundMode : u32 {
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NearestEven = 0,
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PlusInf = 1,
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MinInf = 2,
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ToZero = 3,
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};
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enum class FpDenormMode : u32 {
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InOutFlush = 0,
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InAllowOutFlush = 1,
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InFlushOutAllow = 2,
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InOutAllow = 3,
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};
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enum class FloatClassFunc : u32 {
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SignalingNan = 1 << 0,
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QuietNan = 1 << 1,
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@ -41,13 +27,6 @@ enum class FloatClassFunc : u32 {
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};
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DECLARE_ENUM_FLAG_OPERATORS(FloatClassFunc)
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union Mode {
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BitField<0, 4, FpRoundMode> fp_round;
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BitField<4, 2, FpDenormMode> fp_denorm_single;
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BitField<6, 2, FpDenormMode> fp_denorm_double;
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BitField<8, 1, u32> dx10_clamp;
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};
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union TextureInstInfo {
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u32 raw;
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BitField<0, 1, u32> is_depth;
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