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IndecisiveTurtle 2024-07-01 13:38:44 +03:00 • committed by TheTurtle
parent 410ba37ec2
commit 20e83b4d53
17 changed files with 52 additions and 44 deletions
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4
src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
View file

@ -203,7 +203,7 @@ void EmitStoreBufferF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id addre
for (u32 i = 0; i < 3; i++) {
const Id index{ctx.OpIAdd(ctx.U32[1], address, ctx.ConstU32(i))};
const Id ptr{
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpStore(ptr, ctx.OpCompositeExtract(ctx.F32[1], value, i));
}
return;
@ -220,7 +220,7 @@ void EmitStoreBufferF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id addre
for (u32 i = 0; i < 4; i++) {
const Id index{ctx.OpIAdd(ctx.U32[1], address, ctx.ConstU32(i))};
const Id ptr{
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpStore(ptr, ctx.OpCompositeExtract(ctx.F32[1], value, i));
}
return;

10
src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
View file

@ -28,7 +28,8 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
if (Sirit::ValidId(offset)) {
operands.Add(spv::ImageOperandsMask::ConstOffset, offset);
}
return ctx.OpImageSampleImplicitLod(ctx.F32[4], sampled_image, coords, operands.mask, operands.operands);
return ctx.OpImageSampleImplicitLod(ctx.F32[4], sampled_image, coords, operands.mask,
operands.operands);
}
Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
@ -41,8 +42,8 @@ Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
spv::ImageOperandsMask::Lod, ctx.ConstF32(0.f));
}
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle,
Id coords, Id dref, Id bias_lc, const IR::Value& offset) {
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
Id bias_lc, const IR::Value& offset) {
const auto& texture = ctx.images[handle & 0xFFFF];
const Id image = ctx.OpLoad(texture.image_type, texture.id);
const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]);
@ -91,7 +92,8 @@ Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod
const auto type = ctx.info.images[handle & 0xFFFF].type;
const Id zero = ctx.u32_zero_value;
const auto mips{[&] { return skip_mips ? zero : ctx.OpImageQueryLevels(ctx.U32[1], image); }};
const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa && type != AmdGpu::ImageType::Buffer};
const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa &&
type != AmdGpu::ImageType::Buffer};
const auto query{[&](Id type) {
return uses_lod ? ctx.OpImageQuerySizeLod(type, image, lod)
: ctx.OpImageQuerySize(type, image);

4
src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
View file

@ -338,8 +338,8 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
Id offset);
Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
Id offset);
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle,
Id coords, Id dref, Id bias_lc, const IR::Value& offset);
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
Id bias_lc, const IR::Value& offset);
Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
Id bias_lc, Id offset);
Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,

3
src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
View file

@ -265,7 +265,8 @@ void EmitContext::DefineBuffers(const Info& info) {
const Id struct_type{TypeStruct(record_array_type)};
if (std::ranges::find(type_ids, record_array_type.value, &Id::value) == type_ids.end()) {
Decorate(record_array_type, spv::Decoration::ArrayStride, 4);
const auto name = fmt::format("{}_cbuf_block_{}{}", stage, 'f', sizeof(float) * CHAR_BIT);
const auto name =
fmt::format("{}_cbuf_block_{}{}", stage, 'f', sizeof(float) * CHAR_BIT);
Name(struct_type, name);
Decorate(struct_type, spv::Decoration::Block);
MemberName(struct_type, 0, "data");

6
src/shader_recompiler/ir/ir_emitter.cpp
View file

@ -391,8 +391,8 @@ Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2, const Valu
Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2, const Value& e3,
const Value& e4) {
if (e1.Type() != e2.Type() || e1.Type() != e3.Type() || e1.Type() != e4.Type()) {
UNREACHABLE_MSG("Mismatching types {}, {}, {}, and {}", e1.Type(), e2.Type(),
e3.Type(), e4.Type());
UNREACHABLE_MSG("Mismatching types {}, {}, {}, and {}", e1.Type(), e2.Type(), e3.Type(),
e4.Type());
}
switch (e1.Type()) {
case Type::U32:
@ -647,7 +647,7 @@ F32F64 IREmitter::FPSaturate(const F32F64& value) {
F32F64 IREmitter::FPClamp(const F32F64& value, const F32F64& min_value, const F32F64& max_value) {
if (value.Type() != min_value.Type() || value.Type() != max_value.Type()) {
UNREACHABLE_MSG("Mismatching types {}, {}, and {}", value.Type(), min_value.Type(),
max_value.Type());
max_value.Type());
}
switch (value.Type()) {
case Type::F32: