Merge branch 'main' into miscFixes6

This commit is contained in:
georgemoralis 2024-07-18 18:18:10 +03:00 committed by GitHub
commit 25e95c959a
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GPG key ID: B5690EEEBB952194
49 changed files with 974 additions and 371 deletions

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@ -837,7 +837,15 @@ struct Liverpool {
ShaderProgram ps_program;
INSERT_PADDING_WORDS(0x2C);
ShaderProgram vs_program;
INSERT_PADDING_WORDS(0x2E00 - 0x2C4C - 16);
INSERT_PADDING_WORDS(0x2C);
ShaderProgram gs_program;
INSERT_PADDING_WORDS(0x2C);
ShaderProgram es_program;
INSERT_PADDING_WORDS(0x2C);
ShaderProgram hs_program;
INSERT_PADDING_WORDS(0x2C);
ShaderProgram ls_program;
INSERT_PADDING_WORDS(0xA4);
ComputeProgram cs_program;
INSERT_PADDING_WORDS(0xA008 - 0x2E00 - 80 - 3 - 5);
DepthRenderControl depth_render_control;
@ -916,12 +924,19 @@ struct Liverpool {
const ShaderProgram* ProgramForStage(u32 index) const {
switch (index) {
case 0:
return &vs_program;
case 4:
return &ps_program;
default:
return nullptr;
case 1:
return &vs_program;
case 2:
return &gs_program;
case 3:
return &es_program;
case 4:
return &hs_program;
case 5:
return &ls_program;
}
return nullptr;
}
};
@ -1018,7 +1033,7 @@ private:
Vulkan::Rasterizer* rasterizer{};
std::jthread process_thread{};
u32 num_submits{};
std::atomic<u32> num_submits{};
std::mutex submit_mutex;
std::condition_variable_any submit_cv;
};
@ -1026,6 +1041,10 @@ private:
static_assert(GFX6_3D_REG_INDEX(ps_program) == 0x2C08);
static_assert(GFX6_3D_REG_INDEX(vs_program) == 0x2C48);
static_assert(GFX6_3D_REG_INDEX(vs_program.user_data) == 0x2C4C);
static_assert(GFX6_3D_REG_INDEX(gs_program) == 0x2C88);
static_assert(GFX6_3D_REG_INDEX(es_program) == 0x2CC8);
static_assert(GFX6_3D_REG_INDEX(hs_program) == 0x2D08);
static_assert(GFX6_3D_REG_INDEX(ls_program) == 0x2D48);
static_assert(GFX6_3D_REG_INDEX(cs_program) == 0x2E00);
static_assert(GFX6_3D_REG_INDEX(cs_program.dim_z) == 0x2E03);
static_assert(GFX6_3D_REG_INDEX(cs_program.address_lo) == 0x2E0C);

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@ -66,4 +66,110 @@ int NumBits(DataFormat format) {
return num_bits_per_element[index];
}
static constexpr std::array component_bits = {
std::array{0, 0, 0, 0}, // 0 FormatInvalid
std::array{8, 0, 0, 0}, // 1 Format8
std::array{16, 0, 0, 0}, // 2 Format16
std::array{8, 8, 0, 0}, // 3 Format8_8
std::array{32, 0, 0, 0}, // 4 Format32
std::array{16, 16, 0, 0}, // 5 Format16_16
std::array{10, 11, 11, 0}, // 6 Format10_11_11
std::array{11, 11, 10, 0}, // 7 Format11_11_10
std::array{10, 10, 10, 2}, // 8 Format10_10_10_2
std::array{2, 10, 10, 10}, // 9 Format2_10_10_10
std::array{8, 8, 8, 8}, // 10 Format8_8_8_8
std::array{32, 32, 0, 0}, // 11 Format32_32
std::array{16, 16, 16, 16}, // 12 Format16_16_16_16
std::array{32, 32, 32, 0}, // 13 Format32_32_32
std::array{32, 32, 32, 32}, // 14 Format32_32_32_32
std::array{0, 0, 0, 0}, // 15
std::array{5, 6, 5, 0}, // 16 Format5_6_5
std::array{1, 5, 5, 5}, // 17 Format1_5_5_5
std::array{5, 5, 5, 1}, // 18 Format5_5_5_1
std::array{4, 4, 4, 4}, // 19 Format4_4_4_4
std::array{8, 24, 0, 0}, // 20 Format8_24
std::array{24, 8, 0, 0}, // 21 Format24_8
std::array{24, 8, 0, 0}, // 22 FormatX24_8_32
std::array{0, 0, 0, 0}, // 23
std::array{0, 0, 0, 0}, // 24
std::array{0, 0, 0, 0}, // 25
std::array{0, 0, 0, 0}, // 26
std::array{0, 0, 0, 0}, // 27
std::array{0, 0, 0, 0}, // 28
std::array{0, 0, 0, 0}, // 29
std::array{0, 0, 0, 0}, // 30
std::array{0, 0, 0, 0}, // 31
std::array{0, 0, 0, 0}, // 32 FormatGB_GR
std::array{0, 0, 0, 0}, // 33 FormatBG_RG
std::array{0, 0, 0, 0}, // 34 Format5_9_9_9
std::array{0, 0, 0, 0}, // 35 FormatBc1
std::array{0, 0, 0, 0}, // 36 FormatBc2
std::array{0, 0, 0, 0}, // 37 FormatBc3
std::array{0, 0, 0, 0}, // 38 FormatBc4
std::array{0, 0, 0, 0}, // 39 FormatBc5
std::array{0, 0, 0, 0}, // 40 FormatBc6
std::array{0, 0, 0, 0}, // 41 FormatBc7
};
u32 ComponentBits(DataFormat format, u32 comp) {
const u32 index = static_cast<u32>(format);
if (index >= component_bits.size() || comp >= 4) {
return 0;
}
return component_bits[index][comp];
}
static constexpr std::array component_offset = {
std::array{-1, -1, -1, -1}, // 0 FormatInvalid
std::array{0, -1, -1, -1}, // 1 Format8
std::array{0, -1, -1, -1}, // 2 Format16
std::array{0, 8, -1, -1}, // 3 Format8_8
std::array{0, -1, -1, -1}, // 4 Format32
std::array{0, 16, -1, -1}, // 5 Format16_16
std::array{0, 10, 21, -1}, // 6 Format10_11_11
std::array{0, 11, 22, -1}, // 7 Format11_11_10
std::array{0, 10, 20, 30}, // 8 Format10_10_10_2
std::array{0, 2, 12, 22}, // 9 Format2_10_10_10
std::array{0, 8, 16, 24}, // 10 Format8_8_8_8
std::array{0, 32, -1, -1}, // 11 Format32_32
std::array{0, 16, 32, 48}, // 12 Format16_16_16_16
std::array{0, 32, 64, -1}, // 13 Format32_32_32
std::array{0, 32, 64, 96}, // 14 Format32_32_32_32
std::array{-1, -1, -1, -1}, // 15
std::array{0, 5, 11, -1}, // 16 Format5_6_5
std::array{0, 1, 6, 11}, // 17 Format1_5_5_5
std::array{0, 5, 10, 15}, // 18 Format5_5_5_1
std::array{0, 4, 8, 12}, // 19 Format4_4_4_4
std::array{0, 8, -1, -1}, // 20 Format8_24
std::array{0, 24, -1, -1}, // 21 Format24_8
std::array{0, 24, -1, -1}, // 22 FormatX24_8_32
std::array{-1, -1, -1, -1}, // 23
std::array{-1, -1, -1, -1}, // 24
std::array{-1, -1, -1, -1}, // 25
std::array{-1, -1, -1, -1}, // 26
std::array{-1, -1, -1, -1}, // 27
std::array{-1, -1, -1, -1}, // 28
std::array{-1, -1, -1, -1}, // 29
std::array{-1, -1, -1, -1}, // 30
std::array{-1, -1, -1, -1}, // 31
std::array{-1, -1, -1, -1}, // 32 FormatGB_GR
std::array{-1, -1, -1, -1}, // 33 FormatBG_RG
std::array{-1, -1, -1, -1}, // 34 Format5_9_9_9
std::array{-1, -1, -1, -1}, // 35 FormatBc1
std::array{-1, -1, -1, -1}, // 36 FormatBc2
std::array{-1, -1, -1, -1}, // 37 FormatBc3
std::array{-1, -1, -1, -1}, // 38 FormatBc4
std::array{-1, -1, -1, -1}, // 39 FormatBc5
std::array{-1, -1, -1, -1}, // 40 FormatBc6
std::array{-1, -1, -1, -1}, // 41 FormatBc7
};
s32 ComponentOffset(DataFormat format, u32 comp) {
const u32 index = static_cast<u32>(format);
if (index >= component_offset.size() || comp >= 4) {
return -1;
}
return component_offset[index][comp];
}
} // namespace AmdGpu

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@ -65,6 +65,8 @@ enum class NumberFormat : u32 {
int NumComponents(DataFormat format);
int NumBits(DataFormat format);
u32 ComponentBits(DataFormat format, u32 comp);
s32 ComponentOffset(DataFormat format, u32 comp);
} // namespace AmdGpu

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@ -62,14 +62,6 @@ struct Buffer {
return stride == 0 ? 1U : stride;
}
u32 GetStrideElements(u32 element_size) const noexcept {
if (stride == 0) {
return 1U;
}
ASSERT(stride % element_size == 0);
return stride / element_size;
}
u32 GetSize() const noexcept {
return GetStride() * num_records;
}

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@ -420,6 +420,10 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
num_format == AmdGpu::NumberFormat::Uint) {
return vk::Format::eR32G32B32A32Uint;
}
if (data_format == AmdGpu::DataFormat::Format32_32_32_32 &&
num_format == AmdGpu::NumberFormat::Sint) {
return vk::Format::eR32G32B32A32Sint;
}
if (data_format == AmdGpu::DataFormat::Format8 && num_format == AmdGpu::NumberFormat::Sint) {
return vk::Format::eR8Sint;
}
@ -444,6 +448,12 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
if (data_format == AmdGpu::DataFormat::Format16_16 &&
num_format == AmdGpu::NumberFormat::Uint) {
return vk::Format::eR16G16Uint;
if (data_format == AmdGpu::DataFormat::Format8 && num_format == AmdGpu::NumberFormat::Uint) {
return vk::Format::eR8Uint;
}
if (data_format == AmdGpu::DataFormat::Format16_16_16_16 &&
num_format == AmdGpu::NumberFormat::SnormNz) {
return vk::Format::eR16G16B16A16Snorm;
}
UNREACHABLE_MSG("Unknown data_format={} and num_format={}", u32(data_format), u32(num_format));
}

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@ -48,7 +48,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
boost::container::static_vector<vk::VertexInputBindingDescription, 32> bindings;
boost::container::static_vector<vk::VertexInputAttributeDescription, 32> attributes;
const auto& vs_info = stages[0];
const auto& vs_info = stages[u32(Shader::Stage::Vertex)];
for (const auto& input : vs_info.vs_inputs) {
if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 ||
input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) {
@ -179,20 +179,21 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
.maxDepthBounds = key.depth_bounds_max,
};
u32 shader_count = 1;
u32 shader_count{};
auto stage = u32(Shader::Stage::Vertex);
std::array<vk::PipelineShaderStageCreateInfo, MaxShaderStages> shader_stages;
shader_stages[0] = vk::PipelineShaderStageCreateInfo{
shader_stages[shader_count++] = vk::PipelineShaderStageCreateInfo{
.stage = vk::ShaderStageFlagBits::eVertex,
.module = modules[0],
.module = modules[stage],
.pName = "main",
};
if (modules[4]) {
shader_stages[1] = vk::PipelineShaderStageCreateInfo{
stage = u32(Shader::Stage::Fragment);
if (modules[stage]) {
shader_stages[shader_count++] = vk::PipelineShaderStageCreateInfo{
.stage = vk::ShaderStageFlagBits::eFragment,
.module = modules[4],
.module = modules[stage],
.pName = "main",
};
++shader_count;
}
const auto it = std::ranges::find(key.color_formats, vk::Format::eUndefined);
@ -411,7 +412,7 @@ void GraphicsPipeline::BindResources(Core::MemoryManager* memory, StreamBuffer&
}
void GraphicsPipeline::BindVertexBuffers(StreamBuffer& staging) const {
const auto& vs_info = stages[0];
const auto& vs_info = stages[u32(Shader::Stage::Vertex)];
if (vs_info.vs_inputs.empty()) {
return;
}

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@ -77,7 +77,7 @@ public:
bool IsEmbeddedVs() const noexcept {
static constexpr size_t EmbeddedVsHash = 0x9b2da5cf47f8c29f;
return key.stage_hashes[0] == EmbeddedVsHash;
return key.stage_hashes[u32(Shader::Stage::Vertex)] == EmbeddedVsHash;
}
auto GetWriteMasks() const {

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@ -256,6 +256,12 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
block_pool.ReleaseContents();
inst_pool.ReleaseContents();
if (stage != Shader::Stage::Compute && stage != Shader::Stage::Fragment &&
stage != Shader::Stage::Vertex) {
LOG_ERROR(Render_Vulkan, "Unsupported shader stage {}. PL creation skipped.", stage);
return {};
}
// Recompile shader to IR.
try {
LOG_INFO(Render_Vulkan, "Compiling {} shader {:#x}", stage, hash);

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@ -23,7 +23,7 @@ Rasterizer::Rasterizer(const Instance& instance_, Scheduler& scheduler_,
: instance{instance_}, scheduler{scheduler_}, texture_cache{texture_cache_},
liverpool{liverpool_}, memory{Core::Memory::Instance()},
pipeline_cache{instance, scheduler, liverpool},
vertex_index_buffer{instance, scheduler, VertexIndexFlags, 512_MB, BufferType::Upload} {
vertex_index_buffer{instance, scheduler, VertexIndexFlags, 1_GB, BufferType::Upload} {
if (!Config::nullGpu()) {
liverpool->BindRasterizer(this);
}