mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-05-30 23:33:17 +00:00
Merge branch 'main' into miscFixes6
This commit is contained in:
commit
25e95c959a
49 changed files with 974 additions and 371 deletions
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@ -837,7 +837,15 @@ struct Liverpool {
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ShaderProgram ps_program;
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INSERT_PADDING_WORDS(0x2C);
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ShaderProgram vs_program;
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INSERT_PADDING_WORDS(0x2E00 - 0x2C4C - 16);
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INSERT_PADDING_WORDS(0x2C);
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ShaderProgram gs_program;
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INSERT_PADDING_WORDS(0x2C);
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ShaderProgram es_program;
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INSERT_PADDING_WORDS(0x2C);
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ShaderProgram hs_program;
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INSERT_PADDING_WORDS(0x2C);
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ShaderProgram ls_program;
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INSERT_PADDING_WORDS(0xA4);
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ComputeProgram cs_program;
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INSERT_PADDING_WORDS(0xA008 - 0x2E00 - 80 - 3 - 5);
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DepthRenderControl depth_render_control;
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@ -916,12 +924,19 @@ struct Liverpool {
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const ShaderProgram* ProgramForStage(u32 index) const {
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switch (index) {
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case 0:
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return &vs_program;
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case 4:
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return &ps_program;
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default:
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return nullptr;
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case 1:
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return &vs_program;
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case 2:
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return &gs_program;
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case 3:
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return &es_program;
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case 4:
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return &hs_program;
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case 5:
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return &ls_program;
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}
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return nullptr;
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}
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};
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@ -1018,7 +1033,7 @@ private:
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Vulkan::Rasterizer* rasterizer{};
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std::jthread process_thread{};
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u32 num_submits{};
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std::atomic<u32> num_submits{};
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std::mutex submit_mutex;
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std::condition_variable_any submit_cv;
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};
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@ -1026,6 +1041,10 @@ private:
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static_assert(GFX6_3D_REG_INDEX(ps_program) == 0x2C08);
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static_assert(GFX6_3D_REG_INDEX(vs_program) == 0x2C48);
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static_assert(GFX6_3D_REG_INDEX(vs_program.user_data) == 0x2C4C);
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static_assert(GFX6_3D_REG_INDEX(gs_program) == 0x2C88);
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static_assert(GFX6_3D_REG_INDEX(es_program) == 0x2CC8);
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static_assert(GFX6_3D_REG_INDEX(hs_program) == 0x2D08);
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static_assert(GFX6_3D_REG_INDEX(ls_program) == 0x2D48);
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static_assert(GFX6_3D_REG_INDEX(cs_program) == 0x2E00);
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static_assert(GFX6_3D_REG_INDEX(cs_program.dim_z) == 0x2E03);
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static_assert(GFX6_3D_REG_INDEX(cs_program.address_lo) == 0x2E0C);
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@ -66,4 +66,110 @@ int NumBits(DataFormat format) {
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return num_bits_per_element[index];
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}
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static constexpr std::array component_bits = {
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std::array{0, 0, 0, 0}, // 0 FormatInvalid
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std::array{8, 0, 0, 0}, // 1 Format8
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std::array{16, 0, 0, 0}, // 2 Format16
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std::array{8, 8, 0, 0}, // 3 Format8_8
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std::array{32, 0, 0, 0}, // 4 Format32
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std::array{16, 16, 0, 0}, // 5 Format16_16
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std::array{10, 11, 11, 0}, // 6 Format10_11_11
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std::array{11, 11, 10, 0}, // 7 Format11_11_10
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std::array{10, 10, 10, 2}, // 8 Format10_10_10_2
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std::array{2, 10, 10, 10}, // 9 Format2_10_10_10
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std::array{8, 8, 8, 8}, // 10 Format8_8_8_8
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std::array{32, 32, 0, 0}, // 11 Format32_32
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std::array{16, 16, 16, 16}, // 12 Format16_16_16_16
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std::array{32, 32, 32, 0}, // 13 Format32_32_32
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std::array{32, 32, 32, 32}, // 14 Format32_32_32_32
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std::array{0, 0, 0, 0}, // 15
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std::array{5, 6, 5, 0}, // 16 Format5_6_5
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std::array{1, 5, 5, 5}, // 17 Format1_5_5_5
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std::array{5, 5, 5, 1}, // 18 Format5_5_5_1
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std::array{4, 4, 4, 4}, // 19 Format4_4_4_4
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std::array{8, 24, 0, 0}, // 20 Format8_24
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std::array{24, 8, 0, 0}, // 21 Format24_8
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std::array{24, 8, 0, 0}, // 22 FormatX24_8_32
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std::array{0, 0, 0, 0}, // 23
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std::array{0, 0, 0, 0}, // 24
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std::array{0, 0, 0, 0}, // 25
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std::array{0, 0, 0, 0}, // 26
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std::array{0, 0, 0, 0}, // 27
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std::array{0, 0, 0, 0}, // 28
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std::array{0, 0, 0, 0}, // 29
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std::array{0, 0, 0, 0}, // 30
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std::array{0, 0, 0, 0}, // 31
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std::array{0, 0, 0, 0}, // 32 FormatGB_GR
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std::array{0, 0, 0, 0}, // 33 FormatBG_RG
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std::array{0, 0, 0, 0}, // 34 Format5_9_9_9
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std::array{0, 0, 0, 0}, // 35 FormatBc1
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std::array{0, 0, 0, 0}, // 36 FormatBc2
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std::array{0, 0, 0, 0}, // 37 FormatBc3
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std::array{0, 0, 0, 0}, // 38 FormatBc4
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std::array{0, 0, 0, 0}, // 39 FormatBc5
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std::array{0, 0, 0, 0}, // 40 FormatBc6
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std::array{0, 0, 0, 0}, // 41 FormatBc7
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};
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u32 ComponentBits(DataFormat format, u32 comp) {
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const u32 index = static_cast<u32>(format);
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if (index >= component_bits.size() || comp >= 4) {
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return 0;
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}
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return component_bits[index][comp];
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}
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static constexpr std::array component_offset = {
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std::array{-1, -1, -1, -1}, // 0 FormatInvalid
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std::array{0, -1, -1, -1}, // 1 Format8
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std::array{0, -1, -1, -1}, // 2 Format16
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std::array{0, 8, -1, -1}, // 3 Format8_8
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std::array{0, -1, -1, -1}, // 4 Format32
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std::array{0, 16, -1, -1}, // 5 Format16_16
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std::array{0, 10, 21, -1}, // 6 Format10_11_11
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std::array{0, 11, 22, -1}, // 7 Format11_11_10
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std::array{0, 10, 20, 30}, // 8 Format10_10_10_2
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std::array{0, 2, 12, 22}, // 9 Format2_10_10_10
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std::array{0, 8, 16, 24}, // 10 Format8_8_8_8
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std::array{0, 32, -1, -1}, // 11 Format32_32
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std::array{0, 16, 32, 48}, // 12 Format16_16_16_16
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std::array{0, 32, 64, -1}, // 13 Format32_32_32
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std::array{0, 32, 64, 96}, // 14 Format32_32_32_32
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std::array{-1, -1, -1, -1}, // 15
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std::array{0, 5, 11, -1}, // 16 Format5_6_5
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std::array{0, 1, 6, 11}, // 17 Format1_5_5_5
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std::array{0, 5, 10, 15}, // 18 Format5_5_5_1
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std::array{0, 4, 8, 12}, // 19 Format4_4_4_4
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std::array{0, 8, -1, -1}, // 20 Format8_24
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std::array{0, 24, -1, -1}, // 21 Format24_8
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std::array{0, 24, -1, -1}, // 22 FormatX24_8_32
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std::array{-1, -1, -1, -1}, // 23
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std::array{-1, -1, -1, -1}, // 24
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std::array{-1, -1, -1, -1}, // 25
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std::array{-1, -1, -1, -1}, // 26
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std::array{-1, -1, -1, -1}, // 27
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std::array{-1, -1, -1, -1}, // 28
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std::array{-1, -1, -1, -1}, // 29
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std::array{-1, -1, -1, -1}, // 30
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std::array{-1, -1, -1, -1}, // 31
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std::array{-1, -1, -1, -1}, // 32 FormatGB_GR
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std::array{-1, -1, -1, -1}, // 33 FormatBG_RG
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std::array{-1, -1, -1, -1}, // 34 Format5_9_9_9
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std::array{-1, -1, -1, -1}, // 35 FormatBc1
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std::array{-1, -1, -1, -1}, // 36 FormatBc2
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std::array{-1, -1, -1, -1}, // 37 FormatBc3
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std::array{-1, -1, -1, -1}, // 38 FormatBc4
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std::array{-1, -1, -1, -1}, // 39 FormatBc5
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std::array{-1, -1, -1, -1}, // 40 FormatBc6
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std::array{-1, -1, -1, -1}, // 41 FormatBc7
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};
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s32 ComponentOffset(DataFormat format, u32 comp) {
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const u32 index = static_cast<u32>(format);
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if (index >= component_offset.size() || comp >= 4) {
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return -1;
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}
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return component_offset[index][comp];
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}
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} // namespace AmdGpu
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@ -65,6 +65,8 @@ enum class NumberFormat : u32 {
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int NumComponents(DataFormat format);
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int NumBits(DataFormat format);
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u32 ComponentBits(DataFormat format, u32 comp);
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s32 ComponentOffset(DataFormat format, u32 comp);
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} // namespace AmdGpu
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@ -62,14 +62,6 @@ struct Buffer {
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return stride == 0 ? 1U : stride;
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}
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u32 GetStrideElements(u32 element_size) const noexcept {
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if (stride == 0) {
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return 1U;
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}
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ASSERT(stride % element_size == 0);
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return stride / element_size;
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}
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u32 GetSize() const noexcept {
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return GetStride() * num_records;
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}
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@ -420,6 +420,10 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
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num_format == AmdGpu::NumberFormat::Uint) {
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return vk::Format::eR32G32B32A32Uint;
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}
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if (data_format == AmdGpu::DataFormat::Format32_32_32_32 &&
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num_format == AmdGpu::NumberFormat::Sint) {
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return vk::Format::eR32G32B32A32Sint;
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}
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if (data_format == AmdGpu::DataFormat::Format8 && num_format == AmdGpu::NumberFormat::Sint) {
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return vk::Format::eR8Sint;
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}
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@ -444,6 +448,12 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
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if (data_format == AmdGpu::DataFormat::Format16_16 &&
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num_format == AmdGpu::NumberFormat::Uint) {
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return vk::Format::eR16G16Uint;
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if (data_format == AmdGpu::DataFormat::Format8 && num_format == AmdGpu::NumberFormat::Uint) {
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return vk::Format::eR8Uint;
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}
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if (data_format == AmdGpu::DataFormat::Format16_16_16_16 &&
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num_format == AmdGpu::NumberFormat::SnormNz) {
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return vk::Format::eR16G16B16A16Snorm;
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}
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UNREACHABLE_MSG("Unknown data_format={} and num_format={}", u32(data_format), u32(num_format));
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}
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@ -48,7 +48,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
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boost::container::static_vector<vk::VertexInputBindingDescription, 32> bindings;
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boost::container::static_vector<vk::VertexInputAttributeDescription, 32> attributes;
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const auto& vs_info = stages[0];
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const auto& vs_info = stages[u32(Shader::Stage::Vertex)];
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for (const auto& input : vs_info.vs_inputs) {
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if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 ||
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input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) {
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@ -179,20 +179,21 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
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.maxDepthBounds = key.depth_bounds_max,
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};
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u32 shader_count = 1;
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u32 shader_count{};
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auto stage = u32(Shader::Stage::Vertex);
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std::array<vk::PipelineShaderStageCreateInfo, MaxShaderStages> shader_stages;
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shader_stages[0] = vk::PipelineShaderStageCreateInfo{
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shader_stages[shader_count++] = vk::PipelineShaderStageCreateInfo{
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.stage = vk::ShaderStageFlagBits::eVertex,
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.module = modules[0],
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.module = modules[stage],
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.pName = "main",
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};
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if (modules[4]) {
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shader_stages[1] = vk::PipelineShaderStageCreateInfo{
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stage = u32(Shader::Stage::Fragment);
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if (modules[stage]) {
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shader_stages[shader_count++] = vk::PipelineShaderStageCreateInfo{
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.stage = vk::ShaderStageFlagBits::eFragment,
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.module = modules[4],
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.module = modules[stage],
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.pName = "main",
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};
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++shader_count;
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}
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const auto it = std::ranges::find(key.color_formats, vk::Format::eUndefined);
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@ -411,7 +412,7 @@ void GraphicsPipeline::BindResources(Core::MemoryManager* memory, StreamBuffer&
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}
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void GraphicsPipeline::BindVertexBuffers(StreamBuffer& staging) const {
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const auto& vs_info = stages[0];
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const auto& vs_info = stages[u32(Shader::Stage::Vertex)];
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if (vs_info.vs_inputs.empty()) {
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return;
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}
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@ -77,7 +77,7 @@ public:
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bool IsEmbeddedVs() const noexcept {
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static constexpr size_t EmbeddedVsHash = 0x9b2da5cf47f8c29f;
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return key.stage_hashes[0] == EmbeddedVsHash;
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return key.stage_hashes[u32(Shader::Stage::Vertex)] == EmbeddedVsHash;
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}
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auto GetWriteMasks() const {
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@ -256,6 +256,12 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
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block_pool.ReleaseContents();
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inst_pool.ReleaseContents();
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if (stage != Shader::Stage::Compute && stage != Shader::Stage::Fragment &&
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stage != Shader::Stage::Vertex) {
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LOG_ERROR(Render_Vulkan, "Unsupported shader stage {}. PL creation skipped.", stage);
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return {};
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}
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// Recompile shader to IR.
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try {
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LOG_INFO(Render_Vulkan, "Compiling {} shader {:#x}", stage, hash);
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@ -23,7 +23,7 @@ Rasterizer::Rasterizer(const Instance& instance_, Scheduler& scheduler_,
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: instance{instance_}, scheduler{scheduler_}, texture_cache{texture_cache_},
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liverpool{liverpool_}, memory{Core::Memory::Instance()},
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pipeline_cache{instance, scheduler, liverpool},
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vertex_index_buffer{instance, scheduler, VertexIndexFlags, 512_MB, BufferType::Upload} {
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vertex_index_buffer{instance, scheduler, VertexIndexFlags, 1_GB, BufferType::Upload} {
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if (!Config::nullGpu()) {
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liverpool->BindRasterizer(this);
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}
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