shader_recompiler: Check usage before enabling capabilities (#245)

* vk_instance: Better feature check

* shader_recompiler: Make most features optional

* vk_instance: Bump extension vector size

* resource_tracking_pass: Perform BFS for sharp tracking

* The Witness triggered this

src/shader_recompiler/ir/breadth_first_search.h

@@ -0,0 +1,52 @@
+// SPDX-FileCopyrightText: Copyright 2021 yuzu Emulator Project
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#pragma once
+
+#include <optional>
+#include <type_traits>
+#include <boost/container/small_vector.hpp>
+#include <queue>
+#include "shader_recompiler/ir/value.h"
+
+namespace Shader::IR {
+
+template <typename Pred>
+auto BreadthFirstSearch(const Value& value, Pred&& pred)
+    -> std::invoke_result_t<Pred, const Inst*> {
+    if (value.IsImmediate()) {
+        // Nothing to do with immediates
+        return std::nullopt;
+    }
+    // Breadth-first search visiting the right most arguments first
+    boost::container::small_vector<const Inst*, 2> visited;
+    std::queue<const Inst*> queue;
+    queue.push(value.InstRecursive());
+
+    while (!queue.empty()) {
+        // Pop one instruction from the queue
+        const Inst* const inst{queue.front()};
+        queue.pop();
+        if (const std::optional result = pred(inst)) {
+            // This is the instruction we were looking for
+            return result;
+        }
+        // Visit the right most arguments first
+        for (size_t arg = inst->NumArgs(); arg--;) {
+            const Value arg_value{inst->Arg(arg)};
+            if (arg_value.IsImmediate()) {
+                continue;
+            }
+            // Queue instruction if it hasn't been visited
+            const Inst* const arg_inst{arg_value.InstRecursive()};
+            if (std::ranges::find(visited, arg_inst) == visited.end()) {
+                visited.push_back(arg_inst);
+                queue.push(arg_inst);
+            }
+        }
+    }
+    // SSA tree has been traversed and the result hasn't been found
+    return std::nullopt;
+}
+
+} // namespace Shader::IR

src/shader_recompiler/ir/passes/resource_tracking_pass.cpp

@@ -4,8 +4,8 @@
 #include <algorithm>
 #include <deque>
 #include <boost/container/small_vector.hpp>
-
 #include "shader_recompiler/ir/basic_block.h"
+#include "shader_recompiler/ir/breadth_first_search.h"
 #include "shader_recompiler/ir/ir_emitter.h"
 #include "shader_recompiler/ir/program.h"
 #include "shader_recompiler/runtime_info.h"
@@ -244,22 +244,19 @@ SharpLocation TrackSharp(const IR::Inst* inst) {
     const IR::Inst* spgpr_base = inst->Arg(0).InstRecursive();
 
     // Retrieve SGPR pair that holds sbase
-    const IR::Inst* sbase0 = spgpr_base->Arg(0).InstRecursive();
-    const IR::Inst* sbase1 = spgpr_base->Arg(1).InstRecursive();
-    while (sbase0->GetOpcode() == IR::Opcode::Phi) {
-        sbase0 = sbase0->Arg(0).TryInstRecursive();
-    }
-    while (sbase1->GetOpcode() == IR::Opcode::Phi) {
-        sbase1 = sbase1->Arg(0).TryInstRecursive();
-    }
-    ASSERT_MSG(sbase0->GetOpcode() == IR::Opcode::GetUserData &&
-                   sbase1->GetOpcode() == IR::Opcode::GetUserData,
-               "Nested resource loads not supported");
-    const IR::ScalarReg base = sbase0->Arg(0).ScalarReg();
+    const auto pred = [](const IR::Inst* inst) -> std::optional<IR::ScalarReg> {
+        if (inst->GetOpcode() == IR::Opcode::GetUserData) {
+            return inst->Arg(0).ScalarReg();
+        }
+        return std::nullopt;
+    };
+    const auto base0 = IR::BreadthFirstSearch(spgpr_base->Arg(0), pred);
+    const auto base1 = IR::BreadthFirstSearch(spgpr_base->Arg(1), pred);
+    ASSERT_MSG(base0 && base1, "Nested resource loads not supported");
 
     // Return retrieved location.
     return SharpLocation{
-        .sgpr_base = u32(base),
+        .sgpr_base = u32(base0.value()),
         .dword_offset = dword_offset,
     };
 }

src/shader_recompiler/ir/passes/shader_info_collection_pass.cpp

@@ -26,9 +26,27 @@ void Visit(Info& info, IR::Inst& inst) {
     case IR::Opcode::WriteSharedU16:
         info.uses_shared_u16 = true;
         break;
+    case IR::Opcode::ConvertF32F16:
+    case IR::Opcode::BitCastF16U16:
+        info.uses_fp16 = true;
+        break;
+    case IR::Opcode::ImageWrite:
+        info.has_storage_images = true;
+        break;
     case IR::Opcode::QuadShuffle:
         info.uses_group_quad = true;
         break;
+    case IR::Opcode::Discard:
+        info.has_discard = true;
+        break;
+    case IR::Opcode::ImageGather:
+    case IR::Opcode::ImageGatherDref:
+        info.has_image_gather = true;
+        break;
+    case IR::Opcode::ImageQueryDimensions:
+    case IR::Opcode::ImageQueryLod:
+        info.has_image_query = true;
+        break;
     default:
         break;
     }