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video_core: detiler: display micro 64bpp (#2137)
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parent
8a309c30a9
commit
394331f206
7 changed files with 86 additions and 8 deletions
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@ -182,6 +182,7 @@ void ImageInfo::UpdateSize() {
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case AmdGpu::TilingMode::Texture_Volume:
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mip_d += (-mip_d) & 3u;
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[[fallthrough]];
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case AmdGpu::TilingMode::Display_MicroTiled:
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case AmdGpu::TilingMode::Texture_MicroTiled: {
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std::tie(mip_info.pitch, mip_info.size) =
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ImageSizeMicroTiled(mip_w, mip_h, bpp, num_samples);
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@ -469,9 +469,6 @@ ImageView& TextureCache::FindDepthTarget(BaseDesc& desc) {
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}
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void TextureCache::RefreshImage(Image& image, Vulkan::Scheduler* custom_scheduler /*= nullptr*/) {
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RENDERER_TRACE;
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TRACE_HINT(fmt::format("{:x}:{:x}", image.info.guest_address, image.info.guest_size));
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if (False(image.flags & ImageFlagBits::Dirty)) {
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return;
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}
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@ -480,6 +477,9 @@ void TextureCache::RefreshImage(Image& image, Vulkan::Scheduler* custom_schedule
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return;
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}
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RENDERER_TRACE;
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TRACE_HINT(fmt::format("{:x}:{:x}", image.info.guest_address, image.info.guest_size));
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if (True(image.flags & ImageFlagBits::MaybeCpuDirty) &&
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False(image.flags & ImageFlagBits::CpuDirty)) {
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// The image size should be less than page size to be considered MaybeCpuDirty
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@ -8,6 +8,7 @@
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#include "video_core/texture_cache/image_view.h"
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#include "video_core/texture_cache/tile_manager.h"
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#include "video_core/host_shaders/detilers/display_micro_64bpp_comp.h"
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#include "video_core/host_shaders/detilers/macro_32bpp_comp.h"
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#include "video_core/host_shaders/detilers/macro_64bpp_comp.h"
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#include "video_core/host_shaders/detilers/macro_8bpp_comp.h"
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@ -53,6 +54,14 @@ const DetilerContext* TileManager::GetDetiler(const ImageInfo& info) const {
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return nullptr;
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}
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break;
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case AmdGpu::TilingMode::Display_MicroTiled:
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switch (bpp) {
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case 64:
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return &detilers[DetilerType::Display_Micro64];
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default:
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return nullptr;
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}
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break;
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default:
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return nullptr;
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}
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@ -68,10 +77,11 @@ struct DetilerParams {
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TileManager::TileManager(const Vulkan::Instance& instance, Vulkan::Scheduler& scheduler)
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: instance{instance}, scheduler{scheduler} {
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static const std::array detiler_shaders{
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HostShaders::MICRO_8BPP_COMP, HostShaders::MICRO_16BPP_COMP,
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HostShaders::MICRO_32BPP_COMP, HostShaders::MICRO_64BPP_COMP,
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HostShaders::MICRO_128BPP_COMP, HostShaders::MACRO_8BPP_COMP,
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HostShaders::MACRO_32BPP_COMP, HostShaders::MACRO_64BPP_COMP,
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HostShaders::MICRO_8BPP_COMP, HostShaders::MICRO_16BPP_COMP,
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HostShaders::MICRO_32BPP_COMP, HostShaders::MICRO_64BPP_COMP,
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HostShaders::MICRO_128BPP_COMP, HostShaders::MACRO_8BPP_COMP,
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HostShaders::MACRO_32BPP_COMP, HostShaders::MACRO_64BPP_COMP,
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HostShaders::DISPLAY_MICRO_64BPP_COMP,
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};
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boost::container::static_vector<vk::DescriptorSetLayoutBinding, 2> bindings{
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@ -258,7 +268,8 @@ std::pair<vk::Buffer, u32> TileManager::TryDetile(vk::Buffer in_buffer, u32 in_o
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params.num_levels = info.resources.levels;
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params.pitch0 = info.pitch >> (info.props.is_block ? 2u : 0u);
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params.height = info.size.height;
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if (info.tiling_mode == AmdGpu::TilingMode::Texture_Volume) {
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if (info.tiling_mode == AmdGpu::TilingMode::Texture_Volume ||
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info.tiling_mode == AmdGpu::TilingMode::Display_MicroTiled) {
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ASSERT(info.resources.levels == 1);
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const auto tiles_per_row = info.pitch / 8u;
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const auto tiles_per_slice = tiles_per_row * ((info.size.height + 7u) / 8u);
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@ -22,6 +22,8 @@ enum DetilerType : u32 {
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Macro32,
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Macro64,
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Display_Micro64,
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Max
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};
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