DebugPrintf in shaders (#1252)

* Add shader debug print opcode that uses NonSemantic DebugPrintf extension

* small correction for flags in Inst

* Fix IR Debug Print. Add StringLiteral op

* add missing microinstruction changes for debugprint

* cleanup. delete vaarg stuff. Smuggle format string in Info and flags

* more cleanup

* more

* (dont merge??) update sirit submodule

* fix num args 4 -> 5

* add notes about DebugPrint IR op

* use NumArgsOf again

* copyright

* update sirit submodule

* fix clangformat

* add new Value variant for string literal. Use arg0 for fmt string

* remove string pool changes

* Update src/shader_recompiler/ir/value.cpp

Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>

---------

Co-authored-by: TheTurtle <47210458+raphaelthegreat@users.noreply.github.com>
This commit is contained in:
baggins183 2024-10-06 12:34:40 -07:00 committed by GitHub
parent 310814ac71
commit 3c0255b953
No known key found for this signature in database
GPG key ID: B5690EEEBB952194
16 changed files with 99 additions and 6 deletions

View file

@ -70,6 +70,8 @@ ArgType Arg(EmitContext& ctx, const IR::Value& arg) {
return arg.ScalarReg();
} else if constexpr (std::is_same_v<ArgType, IR::VectorReg>) {
return arg.VectorReg();
} else if constexpr (std::is_same_v<ArgType, const char*>) {
return arg.StringLiteral();
}
}

View file

@ -48,6 +48,7 @@ void EmitPrologue(EmitContext& ctx);
void EmitEpilogue(EmitContext& ctx);
void EmitDiscard(EmitContext& ctx);
void EmitDiscardCond(EmitContext& ctx, Id condition);
void EmitDebugPrint(EmitContext& ctx, IR::Inst* inst, Id arg0, Id arg1, Id arg2, Id arg3, Id arg4);
void EmitBarrier(EmitContext& ctx);
void EmitWorkgroupMemoryBarrier(EmitContext& ctx);
void EmitDeviceMemoryBarrier(EmitContext& ctx);

View file

@ -3,6 +3,7 @@
#include "shader_recompiler/backend/spirv/emit_spirv_instructions.h"
#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
#include "shader_recompiler/ir/debug_print.h"
namespace Shader::Backend::SPIRV {
@ -57,4 +58,11 @@ void EmitEndPrimitive(EmitContext& ctx, const IR::Value& stream) {
throw NotImplementedException("Geometry streams");
}
void EmitDebugPrint(EmitContext& ctx, IR::Inst* inst, Id fmt, Id arg0, Id arg1, Id arg2, Id arg3) {
IR::DebugPrintFlags flags = inst->Flags<IR::DebugPrintFlags>();
std::array<Id, IR::DEBUGPRINT_NUM_FORMAT_ARGS> fmt_args = {arg0, arg1, arg2, arg3};
auto fmt_args_span = std::span<Id>(fmt_args.begin(), fmt_args.begin() + flags.num_args);
ctx.OpDebugPrintf(fmt, fmt_args_span);
}
} // namespace Shader::Backend::SPIRV

View file

@ -91,6 +91,8 @@ Id EmitContext::Def(const IR::Value& value) {
return ConstF32(value.F32());
case IR::Type::F64:
return Constant(F64[1], value.F64());
case IR::Type::StringLiteral:
return String(value.StringLiteral());
default:
throw NotImplementedException("Immediate type {}", value.Type());
}