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https://github.com/shadps4-emu/shadPS4.git
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Tessellation (#1528)
* shader_recompiler: Tessellation WIP * fix compiler errors after merge DONT MERGE set log file to /dev/null DONT MERGE linux pthread bb fix save work DONT MERGE dump ir save more work fix mistake with ES shader skip list add input patch control points dynamic state random stuff * WIP Tessellation partial implementation. Squash commits * test: make local/tcs use attr arrays * attr arrays in TCS/TES * dont define empty attr arrays * switch to special opcodes for tess tcs/tes reads and tcs writes * impl tcs/tes read attr insts * rebase fix * save some work * save work probably broken and slow * put Vertex LogicalStage after TCS and TES to fix bindings * more refactors * refactor pattern matching and optimize modulos (disabled) * enable modulo opt * copyright * rebase fixes * remove some prints * remove some stuff * Add TCS/TES support for shader patching and use LogicalStage * refactor and handle wider DS instructions * get rid of GetAttributes for special tess constants reads. Immediately replace some upon seeing readconstbuffer. Gets rid of some extra passes over IR * stop relying on GNMX HsConstants struct. Change runtime_info.hs_info and some regs * delete some more stuff * update comments for current implementation * some cleanup * uint error * more cleanup * remove patch control points dynamic state (because runtime_info already depends on it) * fix potential problem with determining passthrough --------- Co-authored-by: IndecisiveTurtle <47210458+raphaelthegreat@users.noreply.github.com>
This commit is contained in:
baggins183
GitHub
parent
3e22622508
commit
3c0c921ef5
54 changed files with 2146 additions and 189 deletions
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@ -6,6 +6,7 @@
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#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
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#include "shader_recompiler/frontend/fetch_shader.h"
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#include "shader_recompiler/ir/passes/srt.h"
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#include "shader_recompiler/runtime_info.h"
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#include "video_core/amdgpu/types.h"
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#include <boost/container/static_vector.hpp>
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@ -34,7 +35,7 @@ std::string_view StageName(Stage stage) {
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case Stage::Compute:
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return "cs";
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}
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throw InvalidArgument("Invalid stage {}", u32(stage));
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UNREACHABLE_MSG("Invalid hw stage {}", u32(stage));
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}
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static constexpr u32 NumVertices(AmdGpu::PrimitiveType type) {
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@ -65,7 +66,7 @@ void Name(EmitContext& ctx, Id object, std::string_view format_str, Args&&... ar
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EmitContext::EmitContext(const Profile& profile_, const RuntimeInfo& runtime_info_,
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const Info& info_, Bindings& binding_)
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: Sirit::Module(profile_.supported_spirv), info{info_}, runtime_info{runtime_info_},
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profile{profile_}, stage{info.stage}, binding{binding_} {
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profile{profile_}, stage{info.stage}, l_stage{info.l_stage}, binding{binding_} {
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AddCapability(spv::Capability::Shader);
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DefineArithmeticTypes();
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DefineInterfaces();
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@ -268,9 +269,8 @@ void EmitContext::DefineInputs() {
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U32[1], spv::BuiltIn::SubgroupLocalInvocationId, spv::StorageClass::Input);
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Decorate(subgroup_local_invocation_id, spv::Decoration::Flat);
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}
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switch (stage) {
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case Stage::Export:
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case Stage::Vertex: {
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switch (l_stage) {
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case LogicalStage::Vertex: {
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vertex_index = DefineVariable(U32[1], spv::BuiltIn::VertexIndex, spv::StorageClass::Input);
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base_vertex = DefineVariable(U32[1], spv::BuiltIn::BaseVertex, spv::StorageClass::Input);
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instance_id = DefineVariable(U32[1], spv::BuiltIn::InstanceIndex, spv::StorageClass::Input);
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@ -311,12 +311,11 @@ void EmitContext::DefineInputs() {
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}
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input_params[attrib.semantic] =
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GetAttributeInfo(sharp.GetNumberFmt(), id, 4, false);
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interfaces.push_back(id);
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}
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}
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break;
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}
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case Stage::Fragment:
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case LogicalStage::Fragment:
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frag_coord = DefineVariable(F32[4], spv::BuiltIn::FragCoord, spv::StorageClass::Input);
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frag_depth = DefineVariable(F32[1], spv::BuiltIn::FragDepth, spv::StorageClass::Output);
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front_facing = DefineVariable(U1[1], spv::BuiltIn::FrontFacing, spv::StorageClass::Input);
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@ -351,15 +350,14 @@ void EmitContext::DefineInputs() {
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}
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input_params[semantic] =
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GetAttributeInfo(AmdGpu::NumberFormat::Float, attr_id, num_components, false);
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interfaces.push_back(attr_id);
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}
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break;
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case Stage::Compute:
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case LogicalStage::Compute:
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workgroup_id = DefineVariable(U32[3], spv::BuiltIn::WorkgroupId, spv::StorageClass::Input);
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local_invocation_id =
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DefineVariable(U32[3], spv::BuiltIn::LocalInvocationId, spv::StorageClass::Input);
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break;
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case Stage::Geometry: {
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case LogicalStage::Geometry: {
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primitive_id = DefineVariable(U32[1], spv::BuiltIn::PrimitiveId, spv::StorageClass::Input);
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const auto gl_per_vertex =
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Name(TypeStruct(TypeVector(F32[1], 4), F32[1], TypeArray(F32[1], ConstU32(1u))),
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@ -389,15 +387,129 @@ void EmitContext::DefineInputs() {
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}
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break;
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}
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case LogicalStage::TessellationControl: {
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invocation_id =
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DefineVariable(U32[1], spv::BuiltIn::InvocationId, spv::StorageClass::Input);
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patch_vertices =
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DefineVariable(U32[1], spv::BuiltIn::PatchVertices, spv::StorageClass::Input);
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primitive_id = DefineVariable(U32[1], spv::BuiltIn::PrimitiveId, spv::StorageClass::Input);
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const u32 num_attrs = runtime_info.hs_info.ls_stride >> 4;
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if (num_attrs > 0) {
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const Id per_vertex_type{TypeArray(F32[4], ConstU32(num_attrs))};
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// The input vertex count isn't statically known, so make length 32 (what glslang does)
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const Id patch_array_type{TypeArray(per_vertex_type, ConstU32(32u))};
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input_attr_array = DefineInput(patch_array_type, 0);
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Name(input_attr_array, "in_attrs");
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}
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break;
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}
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case LogicalStage::TessellationEval: {
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tess_coord = DefineInput(F32[3], std::nullopt, spv::BuiltIn::TessCoord);
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primitive_id = DefineVariable(U32[1], spv::BuiltIn::PrimitiveId, spv::StorageClass::Input);
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const u32 num_attrs = runtime_info.vs_info.hs_output_cp_stride >> 4;
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if (num_attrs > 0) {
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const Id per_vertex_type{TypeArray(F32[4], ConstU32(num_attrs))};
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// The input vertex count isn't statically known, so make length 32 (what glslang does)
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const Id patch_array_type{TypeArray(per_vertex_type, ConstU32(32u))};
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input_attr_array = DefineInput(patch_array_type, 0);
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Name(input_attr_array, "in_attrs");
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}
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u32 patch_base_location = runtime_info.vs_info.hs_output_cp_stride >> 4;
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for (size_t index = 0; index < 30; ++index) {
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if (!(info.uses_patches & (1U << index))) {
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continue;
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}
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const Id id{DefineInput(F32[4], patch_base_location + index)};
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Decorate(id, spv::Decoration::Patch);
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Name(id, fmt::format("patch_in{}", index));
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patches[index] = id;
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}
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break;
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}
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default:
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break;
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}
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}
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void EmitContext::DefineOutputs() {
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switch (stage) {
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case Stage::Export:
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case Stage::Vertex: {
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switch (l_stage) {
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case LogicalStage::Vertex: {
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// No point in defining builtin outputs (i.e. position) unless next stage is fragment?
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// Might cause problems linking with tcs
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output_position = DefineVariable(F32[4], spv::BuiltIn::Position, spv::StorageClass::Output);
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const bool has_extra_pos_stores = info.stores.Get(IR::Attribute::Position1) ||
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info.stores.Get(IR::Attribute::Position2) ||
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info.stores.Get(IR::Attribute::Position3);
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if (has_extra_pos_stores) {
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const Id type{TypeArray(F32[1], ConstU32(8U))};
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clip_distances =
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DefineVariable(type, spv::BuiltIn::ClipDistance, spv::StorageClass::Output);
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cull_distances =
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DefineVariable(type, spv::BuiltIn::CullDistance, spv::StorageClass::Output);
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}
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if (stage == Shader::Stage::Local && runtime_info.ls_info.links_with_tcs) {
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const u32 num_attrs = runtime_info.ls_info.ls_stride >> 4;
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if (num_attrs > 0) {
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const Id type{TypeArray(F32[4], ConstU32(num_attrs))};
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output_attr_array = DefineOutput(type, 0);
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Name(output_attr_array, "out_attrs");
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}
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} else {
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for (u32 i = 0; i < IR::NumParams; i++) {
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const IR::Attribute param{IR::Attribute::Param0 + i};
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if (!info.stores.GetAny(param)) {
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continue;
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}
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const u32 num_components = info.stores.NumComponents(param);
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const Id id{DefineOutput(F32[num_components], i)};
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Name(id, fmt::format("out_attr{}", i));
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output_params[i] =
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GetAttributeInfo(AmdGpu::NumberFormat::Float, id, num_components, true);
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}
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}
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break;
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}
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case LogicalStage::TessellationControl: {
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if (info.stores_tess_level_outer) {
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const Id type{TypeArray(F32[1], ConstU32(4U))};
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output_tess_level_outer =
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DefineOutput(type, std::nullopt, spv::BuiltIn::TessLevelOuter);
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Decorate(output_tess_level_outer, spv::Decoration::Patch);
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}
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if (info.stores_tess_level_inner) {
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const Id type{TypeArray(F32[1], ConstU32(2U))};
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output_tess_level_inner =
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DefineOutput(type, std::nullopt, spv::BuiltIn::TessLevelInner);
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Decorate(output_tess_level_inner, spv::Decoration::Patch);
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}
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const u32 num_attrs = runtime_info.hs_info.hs_output_cp_stride >> 4;
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if (num_attrs > 0) {
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const Id per_vertex_type{TypeArray(F32[4], ConstU32(num_attrs))};
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// The input vertex count isn't statically known, so make length 32 (what glslang does)
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const Id patch_array_type{TypeArray(
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per_vertex_type, ConstU32(runtime_info.hs_info.NumOutputControlPoints()))};
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output_attr_array = DefineOutput(patch_array_type, 0);
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Name(output_attr_array, "out_attrs");
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}
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u32 patch_base_location = runtime_info.hs_info.hs_output_cp_stride >> 4;
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for (size_t index = 0; index < 30; ++index) {
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if (!(info.uses_patches & (1U << index))) {
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continue;
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}
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const Id id{DefineOutput(F32[4], patch_base_location + index)};
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Decorate(id, spv::Decoration::Patch);
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Name(id, fmt::format("patch_out{}", index));
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patches[index] = id;
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}
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break;
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}
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case LogicalStage::TessellationEval: {
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output_position = DefineVariable(F32[4], spv::BuiltIn::Position, spv::StorageClass::Output);
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const bool has_extra_pos_stores = info.stores.Get(IR::Attribute::Position1) ||
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info.stores.Get(IR::Attribute::Position2) ||
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@ -419,11 +531,10 @@ void EmitContext::DefineOutputs() {
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Name(id, fmt::format("out_attr{}", i));
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output_params[i] =
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GetAttributeInfo(AmdGpu::NumberFormat::Float, id, num_components, true);
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interfaces.push_back(id);
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}
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break;
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}
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case Stage::Fragment:
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case LogicalStage::Fragment:
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for (u32 i = 0; i < IR::NumRenderTargets; i++) {
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const IR::Attribute mrt{IR::Attribute::RenderTarget0 + i};
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if (!info.stores.GetAny(mrt)) {
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@ -435,22 +546,22 @@ void EmitContext::DefineOutputs() {
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const Id id{DefineOutput(type, i)};
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Name(id, fmt::format("frag_color{}", i));
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frag_outputs[i] = GetAttributeInfo(num_format, id, num_components, true);
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interfaces.push_back(id);
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}
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break;
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case Stage::Geometry: {
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case LogicalStage::Geometry: {
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output_position = DefineVariable(F32[4], spv::BuiltIn::Position, spv::StorageClass::Output);
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for (u32 attr_id = 0; attr_id < info.gs_copy_data.num_attrs; attr_id++) {
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const Id id{DefineOutput(F32[4], attr_id)};
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Name(id, fmt::format("out_attr{}", attr_id));
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output_params[attr_id] = {id, output_f32, F32[1], 4u};
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interfaces.push_back(id);
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}
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break;
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}
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default:
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case LogicalStage::Compute:
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break;
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default:
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UNREACHABLE();
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}
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}
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