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video_core: Bringup some basic functionality (#145)
* video_core: Remove hack in rasterizer * The hack was to skip the first draw as the display buffer had not been created yet and the texture cache couldn't create one itself. With this patch it now can, using the color buffer parameters from registers * shader_recompiler: Implement attribute loads/stores * video_core: Add basic vertex, index buffer handling and pipeline caching * externals: Make xxhash lowercase
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e9f64bb76c
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3c90b8ac00
50 changed files with 1030 additions and 383 deletions
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@ -106,6 +106,10 @@ std::string NameOf(Attribute attribute) {
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return "Param31";
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case Attribute::VertexId:
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return "VertexId";
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case Attribute::InstanceId:
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return "InstanceId";
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case Attribute::FragCoord:
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return "FragCoord";
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default:
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break;
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}
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@ -72,10 +72,12 @@ enum class Attribute : u64 {
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LocalInvocationId = 75,
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LocalInvocationIndex = 76,
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FragCoord = 77,
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Max,
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};
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constexpr size_t EXP_NUM_POS = 4;
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constexpr size_t EXP_NUM_PARAM = 32;
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constexpr size_t NumAttributes = static_cast<size_t>(Attribute::Max);
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constexpr size_t NumRenderTargets = 8;
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constexpr size_t NumParams = 32;
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[[nodiscard]] bool IsParam(Attribute attribute) noexcept;
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@ -86,7 +88,7 @@ constexpr size_t EXP_NUM_PARAM = 32;
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if (result > static_cast<int>(Attribute::Param31)) {
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throw LogicError("Overflow on register arithmetic");
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}
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if (result < static_cast<int>(Attribute::Param0)) {
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if (result < static_cast<int>(Attribute::RenderTarget0)) {
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throw LogicError("Underflow on register arithmetic");
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}
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return static_cast<Attribute>(result);
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@ -174,18 +174,10 @@ void IREmitter::SetVcc(const U1& value) {
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Inst(Opcode::SetVcc, value);
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}
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F32 IREmitter::GetAttribute(IR::Attribute attribute) {
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return GetAttribute(attribute, 0);
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}
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F32 IREmitter::GetAttribute(IR::Attribute attribute, u32 comp) {
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return Inst<F32>(Opcode::GetAttribute, attribute, Imm32(comp));
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}
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U32 IREmitter::GetAttributeU32(IR::Attribute attribute) {
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return GetAttributeU32(attribute, 0);
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}
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U32 IREmitter::GetAttributeU32(IR::Attribute attribute, u32 comp) {
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return Inst<U32>(Opcode::GetAttributeU32, attribute, Imm32(comp));
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}
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@ -58,11 +58,9 @@ public:
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[[nodiscard]] U1 Condition(IR::Condition cond);
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[[nodiscard]] F32 GetAttribute(IR::Attribute attribute);
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[[nodiscard]] F32 GetAttribute(IR::Attribute attribute, u32 comp);
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[[nodiscard]] U32 GetAttributeU32(IR::Attribute attribute);
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[[nodiscard]] U32 GetAttributeU32(IR::Attribute attribute, u32 comp);
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void SetAttribute(IR::Attribute attribute, const F32& value, u32 comp);
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[[nodiscard]] F32 GetAttribute(Attribute attribute, u32 comp = 0);
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[[nodiscard]] U32 GetAttributeU32(Attribute attribute, u32 comp = 0);
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void SetAttribute(Attribute attribute, const F32& value, u32 comp = 0);
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[[nodiscard]] U32U64 ReadShared(int bit_size, bool is_signed, const U32& offset);
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void WriteShared(int bit_size, const Value& value, const U32& offset);
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33
src/shader_recompiler/ir/passes/info_collection.cpp
Normal file
33
src/shader_recompiler/ir/passes/info_collection.cpp
Normal file
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@ -0,0 +1,33 @@
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include "shader_recompiler/ir/program.h"
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namespace Shader::Optimization {
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void Visit(Info& info, IR::Inst& inst) {
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switch (inst.GetOpcode()) {
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case IR::Opcode::GetAttribute:
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case IR::Opcode::GetAttributeU32: {
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info.loads.Set(inst.Arg(0).Attribute(), inst.Arg(1).U32());
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break;
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}
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case IR::Opcode::SetAttribute: {
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info.stores.Set(inst.Arg(0).Attribute(), inst.Arg(2).U32());
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break;
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}
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default:
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break;
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}
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}
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void CollectShaderInfoPass(IR::Program& program) {
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Info& info{program.info};
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for (IR::Block* const block : program.post_order_blocks) {
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for (IR::Inst& inst : block->Instructions()) {
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Visit(info, inst);
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}
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}
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}
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} // namespace Shader::Optimization
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@ -4,6 +4,7 @@
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#pragma once
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#include "shader_recompiler/ir/basic_block.h"
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#include "shader_recompiler/ir/program.h"
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namespace Shader::Optimization {
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@ -11,6 +12,7 @@ void SsaRewritePass(IR::BlockList& program);
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void IdentityRemovalPass(IR::BlockList& program);
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void DeadCodeEliminationPass(IR::BlockList& program);
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void ConstantPropagationPass(IR::BlockList& program);
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void ResourceTrackingPass(IR::BlockList& program);
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void ResourceTrackingPass(IR::Program& program);
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void CollectShaderInfoPass(IR::Program& program);
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} // namespace Shader::Optimization
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@ -113,13 +113,12 @@ SharpLocation TrackSharp(const IR::Value& handle) {
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};
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}
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void ResourceTrackingPass(IR::BlockList& program) {
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for (IR::Block* const block : program) {
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void ResourceTrackingPass(IR::Program& program) {
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for (IR::Block* const block : program.post_order_blocks) {
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for (IR::Inst& inst : block->Instructions()) {
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if (!IsResourceInstruction(inst)) {
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continue;
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}
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printf("ff\n");
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IR::Inst* producer = inst.Arg(0).InstRecursive();
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const auto loc = TrackSharp(producer->Arg(0));
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fmt::print("Found resource s[{}:{}] is_eud = {}\n", loc.index_dwords,
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@ -3,15 +3,11 @@
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#pragma once
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#include <array>
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#include <string>
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#include "shader_recompiler/frontend/instruction.h"
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#include "shader_recompiler/ir/abstract_syntax_list.h"
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#include "shader_recompiler/ir/basic_block.h"
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namespace Shader {
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enum class Stage : u32;
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}
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#include "shader_recompiler/runtime_info.h"
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namespace Shader::IR {
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@ -20,7 +16,7 @@ struct Program {
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BlockList blocks;
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BlockList post_order_blocks;
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std::vector<Gcn::GcnInst> ins_list;
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Stage stage;
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Info info;
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};
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[[nodiscard]] std::string DumpProgram(const Program& program);
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