Mirrors/shadPS4
1
0
Fork 0
mirror of https://github.com/shadps4-emu/shadPS4.git synced 2025-05-19 09:54:54 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 4

vk_graphics_pipeline: Fix regression

Browse source
This commit is contained in:
IndecisiveTurtle 2024-08-08 17:00:08 +03:00
parent 341034fc30
commit 3fd2abdd5b
5 changed files with 9 additions and 9 deletions
Download patch file Download diff file Expand all files Collapse all files

8
src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
View file

@ -129,7 +129,7 @@ Id EmitReadConst(EmitContext& ctx) {
Id EmitReadConstBuffer(EmitContext& ctx, u32 handle, Id index) {
auto& buffer = ctx.buffers[handle];
if (!Sirit::ValidId(buffer.offset)) {
buffer.offset = ctx.GetBufferOffset(handle);
buffer.offset = ctx.GetBufferOffset(buffer.global_binding);
}
const Id offset_dwords{ctx.OpShiftRightLogical(ctx.U32[1], buffer.offset, ctx.ConstU32(2U))};
index = ctx.OpIAdd(ctx.U32[1], index, offset_dwords);
@ -230,7 +230,7 @@ template <u32 N>
static Id EmitLoadBufferF32xN(EmitContext& ctx, u32 handle, Id address) {
auto& buffer = ctx.buffers[handle];
if (!Sirit::ValidId(buffer.offset)) {
buffer.offset = ctx.GetBufferOffset(handle);
buffer.offset = ctx.GetBufferOffset(buffer.global_binding);
}
address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
@ -412,7 +412,7 @@ template <u32 N>
static Id EmitLoadBufferFormatF32xN(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
auto& buffer = ctx.buffers[handle];
if (!Sirit::ValidId(buffer.offset)) {
buffer.offset = ctx.GetBufferOffset(handle);
buffer.offset = ctx.GetBufferOffset(buffer.global_binding);
}
address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
if constexpr (N == 1) {
@ -446,7 +446,7 @@ template <u32 N>
static void EmitStoreBufferF32xN(EmitContext& ctx, u32 handle, Id address, Id value) {
auto& buffer = ctx.buffers[handle];
if (!Sirit::ValidId(buffer.offset)) {
buffer.offset = ctx.GetBufferOffset(handle);
buffer.offset = ctx.GetBufferOffset(buffer.global_binding);
}
address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));

2
src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
View file

@ -352,9 +352,9 @@ void EmitContext::DefineBuffers() {
Decorate(id, spv::Decoration::DescriptorSet, 0U);
Name(id, fmt::format("{}_{}", buffer.is_storage ? "ssbo" : "cbuf", buffer.sgpr_base));
binding++;
buffers.push_back({
.id = id,
.global_binding = binding++,
.data_types = data_types,
.pointer_type = pointer_type,
.buffer = buffer.GetVsharp(info),

1
src/shader_recompiler/backend/spirv/spirv_emit_context.h
View file

@ -203,6 +203,7 @@ public:
struct BufferDefinition {
Id id;
Id offset;
u32 global_binding;
const VectorIds* data_types;
Id pointer_type;
AmdGpu::Buffer buffer;