mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-06-26 20:36:16 +00:00
v_rcp_legacy_f32 (#3040)
This commit is contained in:
parent
23710f397e
commit
4d1a1ce9c2
2 changed files with 17 additions and 0 deletions
|
@ -158,6 +158,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
|
|||
return V_LOG_F32(inst);
|
||||
case Opcode::V_RCP_F32:
|
||||
return V_RCP_F32(inst);
|
||||
case Opcode::V_RCP_LEGACY_F32:
|
||||
return V_RCP_LEGACY_F32(inst);
|
||||
case Opcode::V_RCP_F64:
|
||||
return V_RCP_F64(inst);
|
||||
case Opcode::V_RCP_IFLAG_F32:
|
||||
|
@ -798,6 +800,20 @@ void Translator::V_RCP_F32(const GcnInst& inst) {
|
|||
SetDst(inst.dst[0], ir.FPRecip(src0));
|
||||
}
|
||||
|
||||
void Translator::V_RCP_LEGACY_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc<IR::F32>(inst.src[0])};
|
||||
const auto result = ir.FPRecip(src0);
|
||||
const auto inf = ir.FPIsInf(result);
|
||||
|
||||
const auto raw_result = ir.ConvertFToU(32, result);
|
||||
const auto sign_bit = ir.ShiftRightLogical(raw_result, ir.Imm32(31u));
|
||||
const auto sign_bit_set = ir.INotEqual(sign_bit, ir.Imm32(0u));
|
||||
const IR::F32 inf_result{ir.Select(sign_bit_set, ir.Imm32(-0.0f), ir.Imm32(0.0f))};
|
||||
const IR::F32 val{ir.Select(inf, inf_result, result)};
|
||||
|
||||
SetDst(inst.dst[0], val);
|
||||
}
|
||||
|
||||
void Translator::V_RCP_F64(const GcnInst& inst) {
|
||||
const IR::F64 src0{GetSrc64<IR::F64>(inst.src[0])};
|
||||
SetDst64(inst.dst[0], ir.FPRecip(src0));
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue