mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-05-21 02:45:00 +00:00
video_core: Account of runtime state changes when compiling shaders (#575)
* video_core: Compile shader permutations * spirv: Only specific storage image format for atomics * ir: Avoid cube coord patching for storage image * spirv: Fix default attributes * data_share: Add more instructions * video_core: Query storage flag with runtime state * kernel: Use std::list for semaphore * video_core: Use texture buffers for untyped format load/store * buffer_cache: Limit view usage * vk_pipeline_cache: Fix invalid iterator * image_view: Reduce log spam when alpha=1 in storage swizzle * video_core: More features and proper spirv feature detection * video_core: Attempt no2 for specialization * spirv: Remove conflict * vk_shader_cache: Small cleanup
This commit is contained in:
TheTurtle
GitHub
parent
790d19e59b
commit
66e96dd944
43 changed files with 1058 additions and 976 deletions
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@ -99,7 +99,7 @@ Id TypeId(const EmitContext& ctx, IR::Type type) {
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}
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}
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void Traverse(EmitContext& ctx, IR::Program& program) {
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void Traverse(EmitContext& ctx, const IR::Program& program) {
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IR::Block* current_block{};
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for (const IR::AbstractSyntaxNode& node : program.syntax_list) {
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switch (node.type) {
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@ -162,7 +162,7 @@ void Traverse(EmitContext& ctx, IR::Program& program) {
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}
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}
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Id DefineMain(EmitContext& ctx, IR::Program& program) {
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Id DefineMain(EmitContext& ctx, const IR::Program& program) {
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const Id void_function{ctx.TypeFunction(ctx.void_id)};
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const Id main{ctx.OpFunction(ctx.void_id, spv::FunctionControlMask::MaskNone, void_function)};
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for (IR::Block* const block : program.blocks) {
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@ -185,8 +185,27 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
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ctx.AddCapability(spv::Capability::Int16);
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}
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ctx.AddCapability(spv::Capability::Int64);
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if (info.has_storage_images) {
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if (info.has_storage_images || info.has_image_buffers) {
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ctx.AddCapability(spv::Capability::StorageImageExtendedFormats);
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ctx.AddCapability(spv::Capability::StorageImageWriteWithoutFormat);
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}
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if (info.has_texel_buffers) {
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ctx.AddCapability(spv::Capability::SampledBuffer);
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}
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if (info.has_image_buffers) {
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ctx.AddCapability(spv::Capability::ImageBuffer);
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}
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if (info.has_image_gather) {
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ctx.AddCapability(spv::Capability::ImageGatherExtended);
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}
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if (info.has_image_query) {
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ctx.AddCapability(spv::Capability::ImageQuery);
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}
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if (info.uses_lane_id) {
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ctx.AddCapability(spv::Capability::GroupNonUniform);
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}
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if (info.uses_group_quad) {
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ctx.AddCapability(spv::Capability::GroupNonUniformQuad);
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}
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switch (program.info.stage) {
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case Stage::Compute: {
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@ -206,19 +225,9 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
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} else {
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ctx.AddExecutionMode(main, spv::ExecutionMode::OriginUpperLeft);
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}
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ctx.AddCapability(spv::Capability::GroupNonUniform);
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if (info.uses_group_quad) {
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ctx.AddCapability(spv::Capability::GroupNonUniformQuad);
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}
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if (info.has_discard) {
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ctx.AddCapability(spv::Capability::DemoteToHelperInvocationEXT);
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}
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if (info.has_image_gather) {
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ctx.AddCapability(spv::Capability::ImageGatherExtended);
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}
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if (info.has_image_query) {
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ctx.AddCapability(spv::Capability::ImageQuery);
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}
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if (info.stores.Get(IR::Attribute::Depth)) {
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ctx.AddExecutionMode(main, spv::ExecutionMode::DepthReplacing);
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}
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@ -229,7 +238,7 @@ void DefineEntryPoint(const IR::Program& program, EmitContext& ctx, Id main) {
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ctx.AddEntryPoint(execution_model, main, "main", interfaces);
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}
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void PatchPhiNodes(IR::Program& program, EmitContext& ctx) {
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void PatchPhiNodes(const IR::Program& program, EmitContext& ctx) {
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auto inst{program.blocks.front()->begin()};
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size_t block_index{0};
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ctx.PatchDeferredPhi([&](size_t phi_arg) {
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@ -248,8 +257,8 @@ void PatchPhiNodes(IR::Program& program, EmitContext& ctx) {
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}
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} // Anonymous namespace
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std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program, u32& binding) {
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EmitContext ctx{profile, program, binding};
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std::vector<u32> EmitSPIRV(const Profile& profile, const IR::Program& program, u32& binding) {
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EmitContext ctx{profile, program.info, binding};
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const Id main{DefineMain(ctx, program)};
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DefineEntryPoint(program, ctx, main);
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if (program.info.stage == Stage::Vertex) {
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@ -9,7 +9,7 @@
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namespace Shader::Backend::SPIRV {
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[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, IR::Program& program,
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[[nodiscard]] std::vector<u32> EmitSPIRV(const Profile& profile, const IR::Program& program,
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u32& binding);
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} // namespace Shader::Backend::SPIRV
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@ -262,171 +262,15 @@ Id EmitLoadBufferF32x4(EmitContext& ctx, IR::Inst*, u32 handle, Id address) {
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return EmitLoadBufferF32xN<4>(ctx, handle, address);
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}
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static bool IsSignedInteger(AmdGpu::NumberFormat format) {
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switch (format) {
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case AmdGpu::NumberFormat::Unorm:
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case AmdGpu::NumberFormat::Uscaled:
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case AmdGpu::NumberFormat::Uint:
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return false;
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case AmdGpu::NumberFormat::Snorm:
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case AmdGpu::NumberFormat::Sscaled:
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case AmdGpu::NumberFormat::Sint:
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case AmdGpu::NumberFormat::SnormNz:
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return true;
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case AmdGpu::NumberFormat::Float:
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default:
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UNREACHABLE();
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}
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}
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static u32 UXBitsMax(u32 bit_width) {
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return (1u << bit_width) - 1u;
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}
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static u32 SXBitsMax(u32 bit_width) {
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return (1u << (bit_width - 1u)) - 1u;
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}
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static Id ConvertValue(EmitContext& ctx, Id value, AmdGpu::NumberFormat format, u32 bit_width) {
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switch (format) {
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case AmdGpu::NumberFormat::Unorm:
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return ctx.OpFDiv(ctx.F32[1], value, ctx.ConstF32(float(UXBitsMax(bit_width))));
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case AmdGpu::NumberFormat::Snorm:
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return ctx.OpFDiv(ctx.F32[1], value, ctx.ConstF32(float(SXBitsMax(bit_width))));
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case AmdGpu::NumberFormat::SnormNz:
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// (x * 2 + 1) / (Format::SMAX * 2)
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value = ctx.OpFMul(ctx.F32[1], value, ctx.ConstF32(2.f));
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value = ctx.OpFAdd(ctx.F32[1], value, ctx.ConstF32(1.f));
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return ctx.OpFDiv(ctx.F32[1], value, ctx.ConstF32(float(SXBitsMax(bit_width) * 2)));
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case AmdGpu::NumberFormat::Uscaled:
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case AmdGpu::NumberFormat::Sscaled:
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case AmdGpu::NumberFormat::Uint:
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case AmdGpu::NumberFormat::Sint:
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case AmdGpu::NumberFormat::Float:
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return value;
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default:
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UNREACHABLE_MSG("Unsupported number format for conversion: {}",
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magic_enum::enum_name(format));
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}
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}
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static Id ComponentOffset(EmitContext& ctx, Id address, u32 stride, u32 bit_offset) {
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Id comp_offset = ctx.ConstU32(bit_offset);
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if (stride < 4) {
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// comp_offset += (address % 4) * 8;
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const Id byte_offset = ctx.OpUMod(ctx.U32[1], address, ctx.ConstU32(4u));
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const Id bit_offset = ctx.OpShiftLeftLogical(ctx.U32[1], byte_offset, ctx.ConstU32(3u));
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comp_offset = ctx.OpIAdd(ctx.U32[1], comp_offset, bit_offset);
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}
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return comp_offset;
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}
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static Id GetBufferFormatValue(EmitContext& ctx, u32 handle, Id address, u32 comp) {
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auto& buffer = ctx.buffers[handle];
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const auto format = buffer.dfmt;
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switch (format) {
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case AmdGpu::DataFormat::FormatInvalid:
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return ctx.f32_zero_value;
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case AmdGpu::DataFormat::Format8:
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case AmdGpu::DataFormat::Format16:
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case AmdGpu::DataFormat::Format32:
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case AmdGpu::DataFormat::Format8_8:
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case AmdGpu::DataFormat::Format16_16:
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case AmdGpu::DataFormat::Format10_11_11:
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case AmdGpu::DataFormat::Format11_11_10:
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case AmdGpu::DataFormat::Format10_10_10_2:
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case AmdGpu::DataFormat::Format2_10_10_10:
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case AmdGpu::DataFormat::Format8_8_8_8:
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case AmdGpu::DataFormat::Format32_32:
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case AmdGpu::DataFormat::Format16_16_16_16:
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case AmdGpu::DataFormat::Format32_32_32:
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case AmdGpu::DataFormat::Format32_32_32_32: {
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const u32 num_components = AmdGpu::NumComponents(format);
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if (comp >= num_components) {
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return ctx.f32_zero_value;
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}
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// uint index = address / 4;
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Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
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const u32 stride = buffer.stride;
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if (stride > 4) {
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const u32 index_offset = u32(AmdGpu::ComponentOffset(format, comp) / 32);
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if (index_offset > 0) {
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// index += index_offset;
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index = ctx.OpIAdd(ctx.U32[1], index, ctx.ConstU32(index_offset));
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}
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}
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const Id ptr = ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index);
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const u32 bit_offset = AmdGpu::ComponentOffset(format, comp) % 32;
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const u32 bit_width = AmdGpu::ComponentBits(format, comp);
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const auto num_format = buffer.nfmt;
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if (num_format == AmdGpu::NumberFormat::Float) {
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if (bit_width == 32) {
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return ctx.OpLoad(ctx.F32[1], ptr);
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} else if (bit_width == 16) {
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const Id comp_offset = ComponentOffset(ctx, address, stride, bit_offset);
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Id value = ctx.OpLoad(ctx.U32[1], ptr);
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value =
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ctx.OpBitFieldSExtract(ctx.S32[1], value, comp_offset, ctx.ConstU32(bit_width));
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value = ctx.OpSConvert(ctx.U16, value);
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value = ctx.OpBitcast(ctx.F16[1], value);
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return ctx.OpFConvert(ctx.F32[1], value);
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} else {
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UNREACHABLE_MSG("Invalid float bit width {}", bit_width);
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}
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} else {
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Id value = ctx.OpLoad(ctx.U32[1], ptr);
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const bool is_signed = IsSignedInteger(num_format);
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if (bit_width < 32) {
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const Id comp_offset = ComponentOffset(ctx, address, stride, bit_offset);
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if (is_signed) {
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value = ctx.OpBitFieldSExtract(ctx.S32[1], value, comp_offset,
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ctx.ConstU32(bit_width));
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} else {
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value = ctx.OpBitFieldUExtract(ctx.U32[1], value, comp_offset,
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ctx.ConstU32(bit_width));
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}
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}
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value = ctx.OpBitcast(ctx.F32[1], value);
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return ConvertValue(ctx, value, num_format, bit_width);
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}
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break;
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}
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default:
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UNREACHABLE_MSG("Invalid format for conversion: {}", magic_enum::enum_name(format));
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}
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}
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template <u32 N>
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static Id EmitLoadBufferFormatF32xN(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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auto& buffer = ctx.buffers[handle];
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address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
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if constexpr (N == 1) {
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return GetBufferFormatValue(ctx, handle, address, 0);
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} else {
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boost::container::static_vector<Id, N> ids;
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for (u32 i = 0; i < N; i++) {
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ids.push_back(GetBufferFormatValue(ctx, handle, address, i));
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}
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return ctx.OpCompositeConstruct(ctx.F32[N], ids);
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}
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}
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Id EmitLoadBufferFormatF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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return EmitLoadBufferFormatF32xN<1>(ctx, inst, handle, address);
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}
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Id EmitLoadBufferFormatF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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return EmitLoadBufferFormatF32xN<2>(ctx, inst, handle, address);
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}
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Id EmitLoadBufferFormatF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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return EmitLoadBufferFormatF32xN<3>(ctx, inst, handle, address);
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}
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Id EmitLoadBufferFormatF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address) {
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return EmitLoadBufferFormatF32xN<4>(ctx, inst, handle, address);
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const auto& buffer = ctx.texture_buffers[handle];
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const Id tex_buffer = ctx.OpLoad(buffer.image_type, buffer.id);
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const Id coord = ctx.OpIAdd(ctx.U32[1], address, buffer.coord_offset);
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Id texel = ctx.OpImageFetch(buffer.result_type, tex_buffer, coord);
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if (buffer.is_integer) {
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texel = ctx.OpBitcast(ctx.F32[4], texel);
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}
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return texel;
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}
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template <u32 N>
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@ -467,97 +311,14 @@ void EmitStoreBufferU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address
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EmitStoreBufferF32xN<1>(ctx, handle, address, value);
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}
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static Id ConvertF32ToFormat(EmitContext& ctx, Id value, AmdGpu::NumberFormat format,
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u32 bit_width) {
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switch (format) {
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case AmdGpu::NumberFormat::Unorm:
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return ctx.OpConvertFToU(
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ctx.U32[1], ctx.OpFMul(ctx.F32[1], value, ctx.ConstF32(float(UXBitsMax(bit_width)))));
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case AmdGpu::NumberFormat::Uint:
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return ctx.OpBitcast(ctx.U32[1], value);
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case AmdGpu::NumberFormat::Float:
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return value;
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default:
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UNREACHABLE_MSG("Unsupported number format for conversion: {}",
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magic_enum::enum_name(format));
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}
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}
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template <u32 N>
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static void EmitStoreBufferFormatF32xN(EmitContext& ctx, u32 handle, Id address, Id value) {
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auto& buffer = ctx.buffers[handle];
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const auto format = buffer.dfmt;
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const auto num_format = buffer.nfmt;
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switch (format) {
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case AmdGpu::DataFormat::FormatInvalid:
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return;
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case AmdGpu::DataFormat::Format8_8_8_8:
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case AmdGpu::DataFormat::Format16:
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case AmdGpu::DataFormat::Format32:
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case AmdGpu::DataFormat::Format32_32:
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case AmdGpu::DataFormat::Format32_32_32_32: {
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ASSERT(N == AmdGpu::NumComponents(format));
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address = ctx.OpIAdd(ctx.U32[1], address, buffer.offset);
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const Id index = ctx.OpShiftRightLogical(ctx.U32[1], address, ctx.ConstU32(2u));
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const Id ptr = ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index);
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Id packed_value{};
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for (u32 i = 0; i < N; i++) {
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const u32 bit_width = AmdGpu::ComponentBits(format, i);
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const u32 bit_offset = AmdGpu::ComponentOffset(format, i) % 32;
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const Id comp{ConvertF32ToFormat(
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ctx, N == 1 ? value : ctx.OpCompositeExtract(ctx.F32[1], value, i), num_format,
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bit_width)};
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if (bit_width == 32) {
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if constexpr (N == 1) {
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ctx.OpStore(ptr, comp);
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} else {
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const Id index_i = ctx.OpIAdd(ctx.U32[1], index, ctx.ConstU32(i));
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const Id ptr = ctx.OpAccessChain(buffer.pointer_type, buffer.id,
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ctx.u32_zero_value, index_i);
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ctx.OpStore(ptr, comp);
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}
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} else {
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if (i == 0) {
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packed_value = comp;
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} else {
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packed_value =
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ctx.OpBitFieldInsert(ctx.U32[1], packed_value, comp,
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ctx.ConstU32(bit_offset), ctx.ConstU32(bit_width));
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}
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if (i == N - 1) {
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ctx.OpStore(ptr, packed_value);
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}
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}
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}
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} break;
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default:
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UNREACHABLE_MSG("Invalid format for conversion: {}", magic_enum::enum_name(format));
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}
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}
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void EmitStoreBufferFormatF32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address, Id value) {
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EmitStoreBufferFormatF32xN<1>(ctx, handle, address, value);
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}
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void EmitStoreBufferFormatF32x2(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address,
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Id value) {
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EmitStoreBufferFormatF32xN<2>(ctx, handle, address, value);
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}
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void EmitStoreBufferFormatF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address,
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Id value) {
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EmitStoreBufferFormatF32xN<3>(ctx, handle, address, value);
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}
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void EmitStoreBufferFormatF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id address,
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Id value) {
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EmitStoreBufferFormatF32xN<4>(ctx, handle, address, value);
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const auto& buffer = ctx.texture_buffers[handle];
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const Id tex_buffer = ctx.OpLoad(buffer.image_type, buffer.id);
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const Id coord = ctx.OpIAdd(ctx.U32[1], address, buffer.coord_offset);
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if (buffer.is_integer) {
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value = ctx.OpBitcast(ctx.U32[4], value);
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}
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ctx.OpImageWrite(tex_buffer, coord, value);
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}
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} // namespace Shader::Backend::SPIRV
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|
|
|||
|
|
@ -41,13 +41,14 @@ void Name(EmitContext& ctx, Id object, std::string_view format_str, Args&&... ar
|
|||
|
||||
} // Anonymous namespace
|
||||
|
||||
EmitContext::EmitContext(const Profile& profile_, IR::Program& program, u32& binding_)
|
||||
: Sirit::Module(profile_.supported_spirv), info{program.info}, profile{profile_},
|
||||
stage{program.info.stage}, binding{binding_} {
|
||||
EmitContext::EmitContext(const Profile& profile_, const Shader::Info& info_, u32& binding_)
|
||||
: Sirit::Module(profile_.supported_spirv), info{info_}, profile{profile_}, stage{info.stage},
|
||||
binding{binding_} {
|
||||
AddCapability(spv::Capability::Shader);
|
||||
DefineArithmeticTypes();
|
||||
DefineInterfaces();
|
||||
DefineBuffers();
|
||||
DefineTextureBuffers();
|
||||
DefineImagesAndSamplers();
|
||||
DefineSharedMemory();
|
||||
}
|
||||
|
|
@ -123,25 +124,24 @@ void EmitContext::DefineInterfaces() {
|
|||
DefineOutputs();
|
||||
}
|
||||
|
||||
Id GetAttributeType(EmitContext& ctx, AmdGpu::NumberFormat fmt) {
|
||||
const VectorIds& GetAttributeType(EmitContext& ctx, AmdGpu::NumberFormat fmt) {
|
||||
switch (fmt) {
|
||||
case AmdGpu::NumberFormat::Float:
|
||||
case AmdGpu::NumberFormat::Unorm:
|
||||
case AmdGpu::NumberFormat::Snorm:
|
||||
case AmdGpu::NumberFormat::SnormNz:
|
||||
return ctx.F32[4];
|
||||
case AmdGpu::NumberFormat::Sint:
|
||||
return ctx.S32[4];
|
||||
case AmdGpu::NumberFormat::Uint:
|
||||
return ctx.U32[4];
|
||||
case AmdGpu::NumberFormat::Sscaled:
|
||||
return ctx.F32[4];
|
||||
case AmdGpu::NumberFormat::Uscaled:
|
||||
return ctx.F32[4];
|
||||
case AmdGpu::NumberFormat::Srgb:
|
||||
return ctx.F32;
|
||||
case AmdGpu::NumberFormat::Sint:
|
||||
return ctx.S32;
|
||||
case AmdGpu::NumberFormat::Uint:
|
||||
return ctx.U32;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
throw InvalidArgument("Invalid attribute type {}", fmt);
|
||||
UNREACHABLE_MSG("Invalid attribute type {}", fmt);
|
||||
}
|
||||
|
||||
EmitContext::SpirvAttribute EmitContext::GetAttributeInfo(AmdGpu::NumberFormat fmt, Id id) {
|
||||
|
|
@ -162,7 +162,7 @@ EmitContext::SpirvAttribute EmitContext::GetAttributeInfo(AmdGpu::NumberFormat f
|
|||
default:
|
||||
break;
|
||||
}
|
||||
throw InvalidArgument("Invalid attribute type {}", fmt);
|
||||
UNREACHABLE_MSG("Invalid attribute type {}", fmt);
|
||||
}
|
||||
|
||||
void EmitContext::DefineBufferOffsets() {
|
||||
|
|
@ -177,6 +177,16 @@ void EmitContext::DefineBufferOffsets() {
|
|||
buffer.offset = OpBitFieldUExtract(U32[1], value, ConstU32(offset), ConstU32(8U));
|
||||
buffer.offset_dwords = OpShiftRightLogical(U32[1], buffer.offset, ConstU32(2U));
|
||||
}
|
||||
for (auto& tex_buffer : texture_buffers) {
|
||||
const u32 binding = tex_buffer.binding;
|
||||
const u32 half = Shader::PushData::BufOffsetIndex + (binding >> 4);
|
||||
const u32 comp = (binding & 0xf) >> 2;
|
||||
const u32 offset = (binding & 0x3) << 3;
|
||||
const Id ptr{OpAccessChain(TypePointer(spv::StorageClass::PushConstant, U32[1]),
|
||||
push_data_block, ConstU32(half), ConstU32(comp))};
|
||||
const Id value{OpLoad(U32[1], ptr)};
|
||||
tex_buffer.coord_offset = OpBitFieldUExtract(U32[1], value, ConstU32(offset), ConstU32(8U));
|
||||
}
|
||||
}
|
||||
|
||||
Id MakeDefaultValue(EmitContext& ctx, u32 default_value) {
|
||||
|
|
@ -195,6 +205,11 @@ Id MakeDefaultValue(EmitContext& ctx, u32 default_value) {
|
|||
}
|
||||
|
||||
void EmitContext::DefineInputs() {
|
||||
if (info.uses_lane_id) {
|
||||
subgroup_local_invocation_id = DefineVariable(
|
||||
U32[1], spv::BuiltIn::SubgroupLocalInvocationId, spv::StorageClass::Input);
|
||||
Decorate(subgroup_local_invocation_id, spv::Decoration::Flat);
|
||||
}
|
||||
switch (stage) {
|
||||
case Stage::Vertex: {
|
||||
vertex_index = DefineVariable(U32[1], spv::BuiltIn::VertexIndex, spv::StorageClass::Input);
|
||||
|
|
@ -202,7 +217,7 @@ void EmitContext::DefineInputs() {
|
|||
instance_id = DefineVariable(U32[1], spv::BuiltIn::InstanceIndex, spv::StorageClass::Input);
|
||||
|
||||
for (const auto& input : info.vs_inputs) {
|
||||
const Id type{GetAttributeType(*this, input.fmt)};
|
||||
const Id type{GetAttributeType(*this, input.fmt)[4]};
|
||||
if (input.instance_step_rate == Info::VsInput::InstanceIdType::OverStepRate0 ||
|
||||
input.instance_step_rate == Info::VsInput::InstanceIdType::OverStepRate1) {
|
||||
|
||||
|
|
@ -229,15 +244,12 @@ void EmitContext::DefineInputs() {
|
|||
break;
|
||||
}
|
||||
case Stage::Fragment:
|
||||
subgroup_local_invocation_id = DefineVariable(
|
||||
U32[1], spv::BuiltIn::SubgroupLocalInvocationId, spv::StorageClass::Input);
|
||||
Decorate(subgroup_local_invocation_id, spv::Decoration::Flat);
|
||||
frag_coord = DefineVariable(F32[4], spv::BuiltIn::FragCoord, spv::StorageClass::Input);
|
||||
frag_depth = DefineVariable(F32[1], spv::BuiltIn::FragDepth, spv::StorageClass::Output);
|
||||
front_facing = DefineVariable(U1[1], spv::BuiltIn::FrontFacing, spv::StorageClass::Input);
|
||||
for (const auto& input : info.ps_inputs) {
|
||||
const u32 semantic = input.param_index;
|
||||
if (input.is_default) {
|
||||
if (input.is_default && !input.is_flat) {
|
||||
input_params[semantic] = {MakeDefaultValue(*this, input.default_value), F32[1],
|
||||
F32[1], 4, true};
|
||||
continue;
|
||||
|
|
@ -328,47 +340,74 @@ void EmitContext::DefinePushDataBlock() {
|
|||
|
||||
void EmitContext::DefineBuffers() {
|
||||
boost::container::small_vector<Id, 8> type_ids;
|
||||
for (u32 i = 0; const auto& buffer : info.buffers) {
|
||||
const auto* data_types = True(buffer.used_types & IR::Type::F32) ? &F32 : &U32;
|
||||
const Id data_type = (*data_types)[1];
|
||||
const Id record_array_type{buffer.is_storage
|
||||
? TypeRuntimeArray(data_type)
|
||||
: TypeArray(data_type, ConstU32(buffer.length))};
|
||||
const auto define_struct = [&](Id record_array_type, bool is_instance_data) {
|
||||
const Id struct_type{TypeStruct(record_array_type)};
|
||||
if (std::ranges::find(type_ids, record_array_type.value, &Id::value) == type_ids.end()) {
|
||||
Decorate(record_array_type, spv::Decoration::ArrayStride, 4);
|
||||
const auto name =
|
||||
buffer.is_instance_data
|
||||
? fmt::format("{}_instance_data{}_{}{}", stage, i, 'f',
|
||||
sizeof(float) * CHAR_BIT)
|
||||
: fmt::format("{}_cbuf_block_{}{}", stage, 'f', sizeof(float) * CHAR_BIT);
|
||||
Name(struct_type, name);
|
||||
Decorate(struct_type, spv::Decoration::Block);
|
||||
MemberName(struct_type, 0, "data");
|
||||
MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U);
|
||||
type_ids.push_back(record_array_type);
|
||||
if (std::ranges::find(type_ids, record_array_type.value, &Id::value) != type_ids.end()) {
|
||||
return struct_type;
|
||||
}
|
||||
Decorate(record_array_type, spv::Decoration::ArrayStride, 4);
|
||||
const auto name = is_instance_data ? fmt::format("{}_instance_data_f32", stage)
|
||||
: fmt::format("{}_cbuf_block_f32", stage);
|
||||
Name(struct_type, name);
|
||||
Decorate(struct_type, spv::Decoration::Block);
|
||||
MemberName(struct_type, 0, "data");
|
||||
MemberDecorate(struct_type, 0, spv::Decoration::Offset, 0U);
|
||||
type_ids.push_back(record_array_type);
|
||||
return struct_type;
|
||||
};
|
||||
|
||||
for (const auto& desc : info.buffers) {
|
||||
const auto sharp = desc.GetSharp(info);
|
||||
const bool is_storage = desc.IsStorage(sharp);
|
||||
const auto* data_types = True(desc.used_types & IR::Type::F32) ? &F32 : &U32;
|
||||
const Id data_type = (*data_types)[1];
|
||||
const Id record_array_type{is_storage ? TypeRuntimeArray(data_type)
|
||||
: TypeArray(data_type, ConstU32(sharp.NumDwords()))};
|
||||
const Id struct_type{define_struct(record_array_type, desc.is_instance_data)};
|
||||
|
||||
const auto storage_class =
|
||||
buffer.is_storage ? spv::StorageClass::StorageBuffer : spv::StorageClass::Uniform;
|
||||
is_storage ? spv::StorageClass::StorageBuffer : spv::StorageClass::Uniform;
|
||||
const Id struct_pointer_type{TypePointer(storage_class, struct_type)};
|
||||
const Id pointer_type = TypePointer(storage_class, data_type);
|
||||
const Id id{AddGlobalVariable(struct_pointer_type, storage_class)};
|
||||
Decorate(id, spv::Decoration::Binding, binding);
|
||||
Decorate(id, spv::Decoration::DescriptorSet, 0U);
|
||||
Name(id, fmt::format("{}_{}", buffer.is_storage ? "ssbo" : "cbuf", buffer.sgpr_base));
|
||||
if (is_storage && !desc.is_written) {
|
||||
Decorate(id, spv::Decoration::NonWritable);
|
||||
}
|
||||
Name(id, fmt::format("{}_{}", is_storage ? "ssbo" : "cbuf", desc.sgpr_base));
|
||||
|
||||
buffers.push_back({
|
||||
.id = id,
|
||||
.binding = binding++,
|
||||
.data_types = data_types,
|
||||
.pointer_type = pointer_type,
|
||||
.dfmt = buffer.dfmt,
|
||||
.nfmt = buffer.nfmt,
|
||||
.stride = buffer.GetVsharp(info).GetStride(),
|
||||
});
|
||||
interfaces.push_back(id);
|
||||
i++;
|
||||
}
|
||||
}
|
||||
|
||||
void EmitContext::DefineTextureBuffers() {
|
||||
for (const auto& desc : info.texture_buffers) {
|
||||
const bool is_integer =
|
||||
desc.nfmt == AmdGpu::NumberFormat::Uint || desc.nfmt == AmdGpu::NumberFormat::Sint;
|
||||
const VectorIds& sampled_type{GetAttributeType(*this, desc.nfmt)};
|
||||
const u32 sampled = desc.is_written ? 2 : 1;
|
||||
const Id image_type{TypeImage(sampled_type[1], spv::Dim::Buffer, false, false, false,
|
||||
sampled, spv::ImageFormat::Unknown)};
|
||||
const Id pointer_type{TypePointer(spv::StorageClass::UniformConstant, image_type)};
|
||||
const Id id{AddGlobalVariable(pointer_type, spv::StorageClass::UniformConstant)};
|
||||
Decorate(id, spv::Decoration::Binding, binding);
|
||||
Decorate(id, spv::Decoration::DescriptorSet, 0U);
|
||||
Name(id, fmt::format("{}_{}", desc.is_written ? "imgbuf" : "texbuf", desc.sgpr_base));
|
||||
texture_buffers.push_back({
|
||||
.id = id,
|
||||
.binding = binding++,
|
||||
.image_type = image_type,
|
||||
.result_type = sampled_type[4],
|
||||
.is_integer = is_integer,
|
||||
});
|
||||
interfaces.push_back(id);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -447,7 +486,7 @@ spv::ImageFormat GetFormat(const AmdGpu::Image& image) {
|
|||
|
||||
Id ImageType(EmitContext& ctx, const ImageResource& desc, Id sampled_type) {
|
||||
const auto image = ctx.info.ReadUd<AmdGpu::Image>(desc.sgpr_base, desc.dword_offset);
|
||||
const auto format = desc.is_storage ? GetFormat(image) : spv::ImageFormat::Unknown;
|
||||
const auto format = desc.is_atomic ? GetFormat(image) : spv::ImageFormat::Unknown;
|
||||
const u32 sampled = desc.is_storage ? 2 : 1;
|
||||
switch (desc.type) {
|
||||
case AmdGpu::ImageType::Color1D:
|
||||
|
|
@ -470,17 +509,8 @@ Id ImageType(EmitContext& ctx, const ImageResource& desc, Id sampled_type) {
|
|||
|
||||
void EmitContext::DefineImagesAndSamplers() {
|
||||
for (const auto& image_desc : info.images) {
|
||||
const VectorIds* data_types = [&] {
|
||||
switch (image_desc.nfmt) {
|
||||
case AmdGpu::NumberFormat::Uint:
|
||||
return &U32;
|
||||
case AmdGpu::NumberFormat::Sint:
|
||||
return &S32;
|
||||
default:
|
||||
return &F32;
|
||||
}
|
||||
}();
|
||||
const Id sampled_type = data_types->Get(1);
|
||||
const VectorIds& data_types = GetAttributeType(*this, image_desc.nfmt);
|
||||
const Id sampled_type = data_types[1];
|
||||
const Id image_type{ImageType(*this, image_desc, sampled_type)};
|
||||
const Id pointer_type{TypePointer(spv::StorageClass::UniformConstant, image_type)};
|
||||
const Id id{AddGlobalVariable(pointer_type, spv::StorageClass::UniformConstant)};
|
||||
|
|
@ -489,7 +519,7 @@ void EmitContext::DefineImagesAndSamplers() {
|
|||
Name(id, fmt::format("{}_{}{}_{:02x}", stage, "img", image_desc.sgpr_base,
|
||||
image_desc.dword_offset));
|
||||
images.push_back({
|
||||
.data_types = data_types,
|
||||
.data_types = &data_types,
|
||||
.id = id,
|
||||
.sampled_type = image_desc.is_storage ? sampled_type : TypeSampledImage(image_type),
|
||||
.pointer_type = pointer_type,
|
||||
|
|
@ -498,13 +528,12 @@ void EmitContext::DefineImagesAndSamplers() {
|
|||
interfaces.push_back(id);
|
||||
++binding;
|
||||
}
|
||||
|
||||
image_u32 = TypePointer(spv::StorageClass::Image, U32[1]);
|
||||
|
||||
if (std::ranges::any_of(info.images, &ImageResource::is_atomic)) {
|
||||
image_u32 = TypePointer(spv::StorageClass::Image, U32[1]);
|
||||
}
|
||||
if (info.samplers.empty()) {
|
||||
return;
|
||||
}
|
||||
|
||||
sampler_type = TypeSampler();
|
||||
sampler_pointer_type = TypePointer(spv::StorageClass::UniformConstant, sampler_type);
|
||||
for (const auto& samp_desc : info.samplers) {
|
||||
|
|
@ -520,14 +549,15 @@ void EmitContext::DefineImagesAndSamplers() {
|
|||
}
|
||||
|
||||
void EmitContext::DefineSharedMemory() {
|
||||
static constexpr size_t DefaultSharedMemSize = 16_KB;
|
||||
static constexpr size_t DefaultSharedMemSize = 2_KB;
|
||||
if (!info.uses_shared) {
|
||||
return;
|
||||
}
|
||||
if (info.shared_memory_size == 0) {
|
||||
info.shared_memory_size = DefaultSharedMemSize;
|
||||
u32 shared_memory_size = info.shared_memory_size;
|
||||
if (shared_memory_size == 0) {
|
||||
shared_memory_size = DefaultSharedMemSize;
|
||||
}
|
||||
const u32 num_elements{Common::DivCeil(info.shared_memory_size, 4U)};
|
||||
const u32 num_elements{Common::DivCeil(shared_memory_size, 4U)};
|
||||
const Id type{TypeArray(U32[1], ConstU32(num_elements))};
|
||||
shared_memory_u32_type = TypePointer(spv::StorageClass::Workgroup, type);
|
||||
shared_u32 = TypePointer(spv::StorageClass::Workgroup, U32[1]);
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ struct VectorIds {
|
|||
|
||||
class EmitContext final : public Sirit::Module {
|
||||
public:
|
||||
explicit EmitContext(const Profile& profile, IR::Program& program, u32& binding);
|
||||
explicit EmitContext(const Profile& profile, const Shader::Info& info, u32& binding);
|
||||
~EmitContext();
|
||||
|
||||
Id Def(const IR::Value& value);
|
||||
|
|
@ -124,7 +124,7 @@ public:
|
|||
return ConstantComposite(type, constituents);
|
||||
}
|
||||
|
||||
Info& info;
|
||||
const Info& info;
|
||||
const Profile& profile;
|
||||
Stage stage{};
|
||||
|
||||
|
|
@ -207,13 +207,19 @@ public:
|
|||
u32 binding;
|
||||
const VectorIds* data_types;
|
||||
Id pointer_type;
|
||||
AmdGpu::DataFormat dfmt;
|
||||
AmdGpu::NumberFormat nfmt;
|
||||
u32 stride;
|
||||
};
|
||||
struct TextureBufferDefinition {
|
||||
Id id;
|
||||
Id coord_offset;
|
||||
u32 binding;
|
||||
Id image_type;
|
||||
Id result_type;
|
||||
bool is_integer;
|
||||
};
|
||||
|
||||
u32& binding;
|
||||
boost::container::small_vector<BufferDefinition, 16> buffers;
|
||||
boost::container::small_vector<TextureBufferDefinition, 8> texture_buffers;
|
||||
boost::container::small_vector<TextureDefinition, 8> images;
|
||||
boost::container::small_vector<Id, 4> samplers;
|
||||
|
||||
|
|
@ -238,6 +244,7 @@ private:
|
|||
void DefineOutputs();
|
||||
void DefinePushDataBlock();
|
||||
void DefineBuffers();
|
||||
void DefineTextureBuffers();
|
||||
void DefineImagesAndSamplers();
|
||||
void DefineSharedMemory();
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue