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shader_recompiler: Apply buffer swizzle on vertex attribs
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parent
b4d24d8737
commit
6774216038
3 changed files with 38 additions and 9 deletions
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@ -194,8 +194,30 @@ void Translator::EmitFetch(const GcnInst& inst) {
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for (const auto& attrib : attribs) {
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const IR::Attribute attr{IR::Attribute::Param0 + attrib.semantic};
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IR::VectorReg dst_reg{attrib.dest_vgpr};
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for (u32 i = 0; i < attrib.num_elements; i++) {
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ir.SetVectorReg(dst_reg++, ir.GetAttribute(attr, i));
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// Read the V# of the attribute to figure out component number and type.
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const auto buffer = info.ReadUd<AmdGpu::Buffer>(attrib.sgpr_base, attrib.dword_offset);
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const u32 num_components = AmdGpu::NumComponents(buffer.data_format);
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for (u32 i = 0; i < num_components; i++) {
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const IR::F32 comp = [&] {
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switch (buffer.GetSwizzle(i)) {
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case AmdGpu::CompSwizzle::One:
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return ir.Imm32(1.f);
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case AmdGpu::CompSwizzle::Zero:
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return ir.Imm32(0.f);
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case AmdGpu::CompSwizzle::Red:
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return ir.GetAttribute(attr, 0);
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case AmdGpu::CompSwizzle::Green:
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return ir.GetAttribute(attr, 1);
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case AmdGpu::CompSwizzle::Blue:
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return ir.GetAttribute(attr, 2);
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case AmdGpu::CompSwizzle::Alpha:
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return ir.GetAttribute(attr, 3);
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default:
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UNREACHABLE();
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}
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}();
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ir.SetVectorReg(dst_reg++, comp);
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}
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if (attrib.instance_data == 2 || attrib.instance_data == 3) {
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@ -203,9 +225,6 @@ void Translator::EmitFetch(const GcnInst& inst) {
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attrib.instance_data);
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}
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// Read the V# of the attribute to figure out component number and type.
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const auto buffer = info.ReadUd<AmdGpu::Buffer>(attrib.sgpr_base, attrib.dword_offset);
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const u32 num_components = AmdGpu::NumComponents(buffer.data_format);
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info.vs_inputs.push_back({
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.fmt = buffer.num_format,
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.binding = attrib.semantic,
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