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64 bits OP, impl V_ADDC_U32 & V_MAD_U64_U32 (#310)
* impl V_ADDC_U32 & V_MAD_U64_U32 * shader recompiler: add 64 bits version to get register / GetSrc * fix V_ADDC_U32 carry * shader recompiler: removed automatic conversion to force_flt in GetSRc * shader recompiler: auto cast between u32 and u64 during ssa pass * shader recompiler: fix SetVectorReg64 & standardize switches-case * shader translate: fix overflow detection in V_ADD_I32 use vcc lo instead of vcc thread bit * shader recompiler: more 64-bit work - removed bit_size parameter from Get[Scalar/Vector]Register - add BitwiseOr64 - add SetDst64 as a replacement for SetScalarReg64 & SetVectorReg64 - add GetSrc64 for 64-bit value * shader recompiler: add V_MAD_U64_U32 vcc output - add V_MAD_U64_U32 vcc output - ILessThan for 64-bits * shader recompiler: removed unnecessary changes & missing consts * shader_recompiler: Add s64 type in constant propagation
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12 changed files with 361 additions and 40 deletions
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@ -2392,10 +2392,10 @@ enum class OperandField : u32 {
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ConstFloatPos_4_0,
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ConstFloatNeg_4_0,
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VccZ = 251,
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ExecZ,
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Scc,
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LdsDirect,
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LiteralConst,
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ExecZ = 252,
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Scc = 253,
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LdsDirect = 254,
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LiteralConst = 255,
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VectorGPR,
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Undefined = 0xFFFFFFFF,
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