mirror of
https://github.com/shadps4-emu/shadPS4.git
synced 2025-05-25 04:45:00 +00:00
64 bits OP, impl V_ADDC_U32 & V_MAD_U64_U32 (#310)
* impl V_ADDC_U32 & V_MAD_U64_U32 * shader recompiler: add 64 bits version to get register / GetSrc * fix V_ADDC_U32 carry * shader recompiler: removed automatic conversion to force_flt in GetSRc * shader recompiler: auto cast between u32 and u64 during ssa pass * shader recompiler: fix SetVectorReg64 & standardize switches-case * shader translate: fix overflow detection in V_ADD_I32 use vcc lo instead of vcc thread bit * shader recompiler: more 64-bit work - removed bit_size parameter from Get[Scalar/Vector]Register - add BitwiseOr64 - add SetDst64 as a replacement for SetScalarReg64 & SetVectorReg64 - add GetSrc64 for 64-bit value * shader recompiler: add V_MAD_U64_U32 vcc output - add V_MAD_U64_U32 vcc output - ILessThan for 64-bits * shader recompiler: removed unnecessary changes & missing consts * shader_recompiler: Add s64 type in constant propagation
This commit is contained in:
parent
d84b4adc83
commit
680192a0c4
12 changed files with 361 additions and 40 deletions
|
@ -227,6 +227,7 @@ OPCODE(IAddCary32, U32x2, U32,
|
|||
OPCODE(ISub32, U32, U32, U32, )
|
||||
OPCODE(ISub64, U64, U64, U64, )
|
||||
OPCODE(IMul32, U32, U32, U32, )
|
||||
OPCODE(IMul64, U64, U64, U64, )
|
||||
OPCODE(SMulExt, U32x2, U32, U32, )
|
||||
OPCODE(UMulExt, U32x2, U32, U32, )
|
||||
OPCODE(SDiv32, U32, U32, U32, )
|
||||
|
@ -242,6 +243,7 @@ OPCODE(ShiftRightArithmetic32, U32, U32,
|
|||
OPCODE(ShiftRightArithmetic64, U64, U64, U32, )
|
||||
OPCODE(BitwiseAnd32, U32, U32, U32, )
|
||||
OPCODE(BitwiseOr32, U32, U32, U32, )
|
||||
OPCODE(BitwiseOr64, U64, U64, U64, )
|
||||
OPCODE(BitwiseXor32, U32, U32, U32, )
|
||||
OPCODE(BitFieldInsert, U32, U32, U32, U32, U32, )
|
||||
OPCODE(BitFieldSExtract, U32, U32, U32, U32, )
|
||||
|
@ -258,8 +260,10 @@ OPCODE(SMax32, U32, U32,
|
|||
OPCODE(UMax32, U32, U32, U32, )
|
||||
OPCODE(SClamp32, U32, U32, U32, U32, )
|
||||
OPCODE(UClamp32, U32, U32, U32, U32, )
|
||||
OPCODE(SLessThan, U1, U32, U32, )
|
||||
OPCODE(ULessThan, U1, U32, U32, )
|
||||
OPCODE(SLessThan32, U1, U32, U32, )
|
||||
OPCODE(SLessThan64, U1, U64, U64, )
|
||||
OPCODE(ULessThan32, U1, U32, U32, )
|
||||
OPCODE(ULessThan64, U1, U64, U64, )
|
||||
OPCODE(IEqual, U1, U32, U32, )
|
||||
OPCODE(SLessThanEqual, U1, U32, U32, )
|
||||
OPCODE(ULessThanEqual, U1, U32, U32, )
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue