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shader_recompiler: Improvements to array and cube handling. (#2083)
* shader_recompiler: Account for instruction array flag in image type. * shader_recompiler: Check da flag for all mimg instructions. * shader_recompiler: Convert cube images into 2D arrays. * shader_recompiler: Move image resource functions into sharp type. * shader_recompiler: Use native AMD cube instructions when possible. * specialization: Fix buffer storage mistake.
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93402620de
commit
725814ce01
28 changed files with 217 additions and 144 deletions
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@ -1732,11 +1732,6 @@ Value IREmitter::ImageGatherDref(const Value& handle, const Value& coords, const
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return Inst(Opcode::ImageGatherDref, Flags{info}, handle, coords, offset, dref);
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}
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Value IREmitter::ImageQueryDimension(const Value& handle, const IR::U32& lod,
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const IR::U1& skip_mips) {
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return Inst(Opcode::ImageQueryDimensions, handle, lod, skip_mips);
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}
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Value IREmitter::ImageQueryDimension(const Value& handle, const IR::U32& lod,
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const IR::U1& skip_mips, TextureInstInfo info) {
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return Inst(Opcode::ImageQueryDimensions, Flags{info}, handle, lod, skip_mips);
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@ -1763,6 +1758,14 @@ void IREmitter::ImageWrite(const Value& handle, const Value& coords, const U32&
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Inst(Opcode::ImageWrite, Flags{info}, handle, coords, lod, multisampling, color);
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}
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[[nodiscard]] Value IREmitter::CubeFaceCoord(const Value& cube_coords) {
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return Inst(Opcode::CubeFaceCoord, cube_coords);
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}
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[[nodiscard]] F32 IREmitter::CubeFaceIndex(const Value& cube_coords) {
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return Inst<F32>(Opcode::CubeFaceIndex, cube_coords);
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}
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// Debug print maps to SPIRV's NonSemantic DebugPrintf instruction
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// Renderdoc will hook in its own implementation of the SPIRV instruction
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// Renderdoc accepts format specifiers, e.g. %u, listed here:
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@ -324,8 +324,6 @@ public:
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const F32& dref, const F32& lod,
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const Value& offset, TextureInstInfo info);
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[[nodiscard]] Value ImageQueryDimension(const Value& handle, const U32& lod,
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const U1& skip_mips);
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[[nodiscard]] Value ImageQueryDimension(const Value& handle, const U32& lod,
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const U1& skip_mips, TextureInstInfo info);
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@ -344,6 +342,9 @@ public:
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void ImageWrite(const Value& handle, const Value& coords, const U32& lod,
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const U32& multisampling, const Value& color, TextureInstInfo info);
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[[nodiscard]] Value CubeFaceCoord(const Value& cube_coords);
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[[nodiscard]] F32 CubeFaceIndex(const Value& cube_coords);
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void EmitVertex();
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void EmitPrimitive();
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@ -374,6 +374,10 @@ OPCODE(ImageAtomicOr32, U32, Opaq
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OPCODE(ImageAtomicXor32, U32, Opaque, Opaque, U32, )
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OPCODE(ImageAtomicExchange32, U32, Opaque, Opaque, U32, )
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// Cube operations - optional, usable if profile.supports_native_cube_calc
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OPCODE(CubeFaceCoord, F32x2, F32x3, )
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OPCODE(CubeFaceIndex, F32, F32x3, )
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// Warp operations
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OPCODE(LaneId, U32, )
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OPCODE(WarpId, U32, )
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@ -161,10 +161,9 @@ public:
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u32 Add(const ImageResource& desc) {
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const u32 index{Add(image_resources, desc, [&desc](const auto& existing) {
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return desc.sharp_idx == existing.sharp_idx;
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return desc.sharp_idx == existing.sharp_idx && desc.is_array == existing.is_array;
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})};
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auto& image = image_resources[index];
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image.is_read |= desc.is_read;
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image.is_written |= desc.is_written;
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return index;
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}
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@ -361,7 +360,6 @@ void PatchImageSharp(IR::Block& block, IR::Inst& inst, Info& info, Descriptors&
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image = AmdGpu::Image::Null();
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}
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ASSERT(image.GetType() != AmdGpu::ImageType::Invalid);
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const bool is_read = inst.GetOpcode() == IR::Opcode::ImageRead;
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const bool is_written = inst.GetOpcode() == IR::Opcode::ImageWrite;
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// Patch image instruction if image is FMask.
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@ -402,7 +400,6 @@ void PatchImageSharp(IR::Block& block, IR::Inst& inst, Info& info, Descriptors&
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.is_depth = bool(inst_info.is_depth),
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.is_atomic = IsImageAtomicInstruction(inst),
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.is_array = bool(inst_info.is_array),
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.is_read = is_read,
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.is_written = is_written,
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});
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@ -560,32 +557,6 @@ void PatchTextureBufferArgs(IR::Block& block, IR::Inst& inst, Info& info) {
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}
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}
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IR::Value PatchCubeCoord(IR::IREmitter& ir, const IR::Value& s, const IR::Value& t,
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const IR::Value& z, bool is_written, bool is_array) {
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// When cubemap is written with imageStore it is treated like 2DArray.
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if (is_written) {
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return ir.CompositeConstruct(s, t, z);
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}
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ASSERT(s.Type() == IR::Type::F32); // in case of fetched image need to adjust the code below
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// We need to fix x and y coordinate,
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// because the s and t coordinate will be scaled and plus 1.5 by v_madak_f32.
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// We already force the scale value to be 1.0 when handling v_cubema_f32,
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// here we subtract 1.5 to recover the original value.
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const IR::Value x = ir.FPSub(IR::F32{s}, ir.Imm32(1.5f));
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const IR::Value y = ir.FPSub(IR::F32{t}, ir.Imm32(1.5f));
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if (is_array) {
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const IR::U32 array_index = ir.ConvertFToU(32, IR::F32{z});
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const IR::U32 face_id = ir.BitwiseAnd(array_index, ir.Imm32(7u));
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const IR::U32 slice_id = ir.ShiftRightLogical(array_index, ir.Imm32(3u));
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return ir.CompositeConstruct(x, y, ir.ConvertIToF(32, 32, false, face_id),
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ir.ConvertIToF(32, 32, false, slice_id));
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} else {
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return ir.CompositeConstruct(x, y, z);
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}
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}
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void PatchImageSampleArgs(IR::Block& block, IR::Inst& inst, Info& info,
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const AmdGpu::Image& image) {
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const auto handle = inst.Arg(0);
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@ -649,7 +620,6 @@ void PatchImageSampleArgs(IR::Block& block, IR::Inst& inst, Info& info,
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case AmdGpu::ImageType::Color2DMsaa:
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return ir.CompositeConstruct(read(0), read(8));
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case AmdGpu::ImageType::Color3D:
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case AmdGpu::ImageType::Cube:
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return ir.CompositeConstruct(read(0), read(8), read(16));
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default:
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UNREACHABLE();
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@ -675,7 +645,6 @@ void PatchImageSampleArgs(IR::Block& block, IR::Inst& inst, Info& info,
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return {ir.CompositeConstruct(get_addr_reg(addr_reg - 4), get_addr_reg(addr_reg - 3)),
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ir.CompositeConstruct(get_addr_reg(addr_reg - 2), get_addr_reg(addr_reg - 1))};
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case AmdGpu::ImageType::Color3D:
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case AmdGpu::ImageType::Cube:
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// (du/dx, dv/dx, dw/dx), (du/dy, dv/dy, dw/dy)
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addr_reg = addr_reg + 6;
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return {ir.CompositeConstruct(get_addr_reg(addr_reg - 6), get_addr_reg(addr_reg - 5),
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@ -691,7 +660,8 @@ void PatchImageSampleArgs(IR::Block& block, IR::Inst& inst, Info& info,
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// Query dimensions of image if needed for normalization.
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// We can't use the image sharp because it could be bound to a different image later.
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const auto dimensions =
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unnormalized ? ir.ImageQueryDimension(handle, ir.Imm32(0u), ir.Imm1(false)) : IR::Value{};
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unnormalized ? ir.ImageQueryDimension(handle, ir.Imm32(0u), ir.Imm1(false), inst_info)
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: IR::Value{};
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const auto get_coord = [&](u32 coord_idx, u32 dim_idx) -> IR::Value {
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const auto coord = get_addr_reg(coord_idx);
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if (unnormalized) {
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@ -724,10 +694,6 @@ void PatchImageSampleArgs(IR::Block& block, IR::Inst& inst, Info& info,
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addr_reg = addr_reg + 3;
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return ir.CompositeConstruct(get_coord(addr_reg - 3, 0), get_coord(addr_reg - 2, 1),
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get_coord(addr_reg - 1, 2));
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case AmdGpu::ImageType::Cube: // x, y, face
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addr_reg = addr_reg + 3;
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return PatchCubeCoord(ir, get_coord(addr_reg - 3, 0), get_coord(addr_reg - 2, 1),
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get_addr_reg(addr_reg - 1), false, inst_info.is_array);
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default:
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UNREACHABLE();
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}
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@ -805,10 +771,6 @@ void PatchImageArgs(IR::Block& block, IR::Inst& inst, Info& info) {
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[[fallthrough]];
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case AmdGpu::ImageType::Color3D: // x, y, z, [lod]
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return {ir.CompositeConstruct(body->Arg(0), body->Arg(1), body->Arg(2)), body->Arg(3)};
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case AmdGpu::ImageType::Cube: // x, y, face, [lod]
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return {PatchCubeCoord(ir, body->Arg(0), body->Arg(1), body->Arg(2),
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inst.GetOpcode() == IR::Opcode::ImageWrite, inst_info.is_array),
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body->Arg(3)};
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default:
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UNREACHABLE_MSG("Unknown image type {}", image.GetType());
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}
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@ -820,7 +782,7 @@ void PatchImageArgs(IR::Block& block, IR::Inst& inst, Info& info) {
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const auto lod = inst_info.has_lod ? IR::U32{arg} : IR::U32{};
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const auto ms = has_ms ? IR::U32{arg} : IR::U32{};
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const auto is_storage = image_res.IsStorage(image);
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const auto is_storage = image_res.is_written;
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if (inst.GetOpcode() == IR::Opcode::ImageRead) {
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auto texel = ir.ImageRead(handle, coords, lod, ms, inst_info);
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if (is_storage) {
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@ -5,7 +5,7 @@
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namespace Shader::Optimization {
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void Visit(Info& info, IR::Inst& inst) {
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void Visit(Info& info, const IR::Inst& inst) {
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switch (inst.GetOpcode()) {
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case IR::Opcode::GetAttribute:
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case IR::Opcode::GetAttributeU32:
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