video_core: Various small improvements and bug fixes (#2525)

* ir_passes: Add barrier at end of block too

* vk_platform: Always assign names to resources

* texture_cache: Better overlap handling

* liverpool: Avoid resuming ce_task when its finished

* spirv_quad_rect: Skip default attributes

Fixes some crashes

* memory: Improve buffer size clamping

* liverpool: Relax binary header validity check

* liverpool: Stub SetPredication with a warning

* Better than outright crash

* emit_spirv: Implement round to zero mode

* liverpool: queue::pop takes the front element

* image_info: Remove obsolete assert

The old code assumed the mip only had 1 layer thus a right overlap could not return mip 0. But with the new path we handle images that are both mip-mapped and multi-layer, thus this can happen

* tile_manager: Fix size calculation

* spirv_quad_rect: Skip default attributes

---------

Co-authored-by: poly <47796739+polybiusproxy@users.noreply.github.com>
Co-authored-by: squidbus <175574877+squidbus@users.noreply.github.com>

src/shader_recompiler/backend/spirv/emit_spirv.cpp

@@ -369,7 +369,12 @@ void SetupFloatMode(EmitContext& ctx, const Profile& profile, const RuntimeInfo&
         LOG_WARNING(Render_Vulkan, "Unknown FP denorm mode {}", u32(fp_denorm_mode));
     }
     const auto fp_round_mode = runtime_info.fp_round_mode32;
-    if (fp_round_mode != AmdGpu::FpRoundMode::NearestEven) {
+    if (fp_round_mode == AmdGpu::FpRoundMode::ToZero) {
+        if (profile.support_fp32_round_to_zero) {
+            ctx.AddCapability(spv::Capability::RoundingModeRTZ);
+            ctx.AddExecutionMode(main_func, spv::ExecutionMode::RoundingModeRTZ, 32U);
+        }
+    } else if (fp_round_mode != AmdGpu::FpRoundMode::NearestEven) {
         LOG_WARNING(Render_Vulkan, "Unknown FP rounding mode {}", u32(fp_round_mode));
     }
 }

src/shader_recompiler/backend/spirv/emit_spirv_quad_rect.cpp

@@ -13,8 +13,7 @@ constexpr u32 SPIRV_VERSION_1_5 = 0x00010500;
 
 struct QuadRectListEmitter : public Sirit::Module {
     explicit QuadRectListEmitter(const FragmentRuntimeInfo& fs_info_)
-        : Sirit::Module{SPIRV_VERSION_1_5}, fs_info{fs_info_}, inputs{fs_info_.num_inputs},
-          outputs{fs_info_.num_inputs} {
+        : Sirit::Module{SPIRV_VERSION_1_5}, fs_info{fs_info_} {
         void_id = TypeVoid();
         bool_id = TypeBool();
         float_id = TypeFloat(32);
@@ -253,15 +252,16 @@ private:
         } else {
             gl_per_vertex = AddOutput(gl_per_vertex_type);
         }
+        outputs.reserve(fs_info.num_inputs);
         for (int i = 0; i < fs_info.num_inputs; i++) {
             const auto& input = fs_info.inputs[i];
             if (input.IsDefault()) {
                 continue;
             }
-            outputs[i] = AddOutput(model == spv::ExecutionModel::TessellationControl
-                                       ? TypeArray(vec4_id, Int(4))
-                                       : vec4_id);
-            Decorate(outputs[i], spv::Decoration::Location, input.param_index);
+            outputs.emplace_back(AddOutput(model == spv::ExecutionModel::TessellationControl
+                                               ? TypeArray(vec4_id, Int(4))
+                                               : vec4_id));
+            Decorate(outputs.back(), spv::Decoration::Location, input.param_index);
         }
     }
 
@@ -276,13 +276,14 @@ private:
         const Id gl_per_vertex_array{TypeArray(gl_per_vertex_type, Constant(uint_id, 32U))};
         gl_in = AddInput(gl_per_vertex_array);
         const Id float_arr{TypeArray(vec4_id, Int(32))};
+        inputs.reserve(fs_info.num_inputs);
         for (int i = 0; i < fs_info.num_inputs; i++) {
             const auto& input = fs_info.inputs[i];
             if (input.IsDefault()) {
                 continue;
             }
-            inputs[i] = AddInput(float_arr);
-            Decorate(inputs[i], spv::Decoration::Location, input.param_index);
+            inputs.emplace_back(AddInput(float_arr));
+            Decorate(inputs.back(), spv::Decoration::Location, input.param_index);
         }
     }
 
@@ -334,4 +335,4 @@ std::vector<u32> EmitAuxilaryTessShader(AuxShaderType type, const FragmentRuntim
     return ctx.Assemble();
 }
 
-} // namespace Shader::Backend::SPIRV
+} // namespace Shader::Backend::SPIRV

src/shader_recompiler/ir/passes/shared_memory_barrier_pass.cpp

@@ -43,6 +43,10 @@ static void EmitBarrierInBlock(IR::Block* block) {
             action = BarrierAction::BarrierOnRead;
         }
     }
+    if (action != BarrierAction::None) {
+        IR::IREmitter ir{*block, --block->end()};
+        ir.Barrier();
+    }
 }
 
 // Inserts a barrier after divergent conditional blocks to avoid undefined

src/shader_recompiler/profile.h

@@ -21,6 +21,7 @@ struct Profile {
     bool support_separate_rounding_mode{};
     bool support_fp32_denorm_preserve{};
     bool support_fp32_denorm_flush{};
+    bool support_fp32_round_to_zero{};
     bool support_explicit_workgroup_layout{};
     bool support_legacy_vertex_attributes{};
     bool supports_image_load_store_lod{};