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video: Import new shader recompiler + display a triangle (#142)
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103 changed files with 17793 additions and 729 deletions
208
src/shader_recompiler/frontend/instruction.h
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208
src/shader_recompiler/frontend/instruction.h
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include <limits>
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#include "common/bit_field.h"
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#include "shader_recompiler/frontend/opcodes.h"
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namespace Shader::Gcn {
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constexpr u32 GcnMaxSrcCount = 4;
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constexpr u32 GcnMaxDstCount = 2;
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enum OperandFieldRange {
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ScalarGPRMin = 0,
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ScalarGPRMax = 103,
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SignedConstIntPosMin = 129,
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SignedConstIntPosMax = 192,
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SignedConstIntNegMin = 193,
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SignedConstIntNegMax = 208,
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ConstFloatMin = 240,
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VectorGPRMin = 256,
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VectorGPRMax = 511
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};
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/// These are applied after loading an operand register.
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struct InputModifiers {
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bool neg = false;
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bool abs = false;
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};
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/// These are applied before storing an operand register.
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struct OutputModifiers {
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bool clamp = false;
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float multiplier = std::numeric_limits<float>::quiet_NaN();
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};
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struct InstOperand {
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OperandField field = OperandField::Undefined;
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ScalarType type = ScalarType::Undefined;
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InputModifiers input_modifier = {};
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OutputModifiers output_modifier = {};
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u32 code = 0xFFFFFFFF;
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};
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struct Operand {
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OperandField field = OperandField::Undefined;
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ScalarType type = ScalarType::Undefined;
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union {
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InputModifiers input_modifier = {};
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OutputModifiers output_modifier;
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};
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u32 code = 0xFFFFFFFF;
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};
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struct InstSOPK {
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u16 simm;
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};
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struct InstSOPP {
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u16 simm;
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};
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struct InstVOP3 {
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Operand vdst;
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Operand src0;
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Operand src1;
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Operand src2;
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};
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struct SMRD {
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u8 offset;
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bool imm;
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u8 sbase;
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};
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struct InstControlSOPK {
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BitField<0, 16, u32> simm;
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};
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struct InstControlSOPP {
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BitField<0, 16, u32> simm;
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};
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struct InstControlVOP3 {
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u64 : 8;
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u64 abs : 3;
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u64 clmp : 1;
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u64 : 47;
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u64 omod : 2;
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u64 neg : 3;
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};
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struct InstControlSMRD {
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u32 offset : 8;
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u32 imm : 1;
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u32 count : 5;
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u32 : 18;
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};
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struct InstControlMUBUF {
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u64 offset : 12;
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u64 offen : 1;
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u64 idxen : 1;
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u64 glc : 1;
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u64 : 1;
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u64 lds : 1;
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u64 : 37;
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u64 slc : 1;
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u64 tfe : 1;
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u64 count : 3;
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u64 size : 5;
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};
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struct InstControlMTBUF {
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u64 offset : 12;
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u64 offen : 1;
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u64 idxen : 1;
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u64 glc : 1;
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u64 : 4;
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u64 dfmt : 4;
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u64 nfmt : 3;
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u64 : 28;
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u64 slc : 1;
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u64 tfe : 1;
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u64 count : 3;
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u64 size : 5;
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};
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struct InstControlMIMG {
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u64 : 8;
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u64 dmask : 4;
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u64 unrm : 1;
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u64 glc : 1;
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u64 da : 1;
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u64 r128 : 1;
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u64 tfe : 1;
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u64 lwe : 1;
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u64 : 7;
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u64 slc : 1;
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u64 mod : 32;
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u64 : 6;
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};
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struct InstControlDS {
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u64 offset0 : 8;
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u64 offset1 : 8;
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u64 : 1;
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u64 gds : 1;
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u64 dual : 1;
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u64 sign : 1;
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u64 relative : 1;
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u64 stride : 1;
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u64 size : 4;
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u64 : 38;
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};
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struct InstControlVINTRP {
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u32 : 8;
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u32 chan : 2;
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u32 attr : 6;
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u32 : 16;
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};
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struct InstControlEXP {
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u64 en : 4;
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u64 target : 6;
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u64 compr : 1;
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u64 done : 1;
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u64 vm : 1;
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u64 reserved : 51;
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};
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union InstControl {
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InstControlSOPK sopk;
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InstControlSOPP sopp;
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InstControlVOP3 vop3;
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InstControlSMRD smrd;
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InstControlMUBUF mubuf;
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InstControlMTBUF mtbuf;
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InstControlMIMG mimg;
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InstControlDS ds;
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InstControlVINTRP vintrp;
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InstControlEXP exp;
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};
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struct GcnInst {
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Opcode opcode;
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InstEncoding encoding;
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InstClass inst_class;
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InstCategory category;
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InstControl control;
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u32 length;
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u32 src_count;
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u32 dst_count;
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std::array<InstOperand, GcnMaxSrcCount> src;
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std::array<InstOperand, GcnMaxDstCount> dst;
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u32 BranchTarget(u32 pc) const;
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bool IsTerminateInstruction() const;
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bool IsUnconditionalBranch() const;
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bool IsConditionalBranch() const;
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bool IsFork() const;
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};
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} // namespace Shader::Gcn
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