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https://github.com/shadps4-emu/shadPS4.git
synced 2025-05-18 01:14:56 +00:00
shader_recompiler: Add more instructions
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parent
ce31fad222
commit
8850c2f4be
7 changed files with 122 additions and 7 deletions
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@ -324,7 +324,10 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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translator.IMAGE_STORE(inst);
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break;
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case Opcode::IMAGE_LOAD_MIP:
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translator.IMAGE_LOAD_MIP(inst);
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translator.IMAGE_LOAD(true, inst);
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break;
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case Opcode::IMAGE_LOAD:
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translator.IMAGE_LOAD(false, inst);
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break;
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case Opcode::V_CMP_GE_I32:
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translator.V_CMP_U32(ConditionOp::GE, true, false, inst);
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@ -335,6 +338,9 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::V_CMP_LE_I32:
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translator.V_CMP_U32(ConditionOp::LE, true, false, inst);
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break;
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case Opcode::V_CMP_NE_I32:
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translator.V_CMP_U32(ConditionOp::LG, true, false, inst);
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break;
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case Opcode::V_CMP_NE_U32:
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translator.V_CMP_U32(ConditionOp::LG, false, false, inst);
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break;
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@ -386,6 +392,9 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::V_CMP_NLT_F32:
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translator.V_CMP_F32(ConditionOp::GE, false, inst);
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break;
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case Opcode::S_CMP_LT_U32:
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translator.S_CMP(ConditionOp::LT, false, inst);
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break;
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case Opcode::S_CMP_LG_U32:
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translator.S_CMP(ConditionOp::LG, false, inst);
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break;
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@ -585,6 +594,9 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::S_AND_B64:
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translator.S_AND_B64(false, inst);
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break;
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case Opcode::S_NOT_B64:
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translator.S_NOT_B64(inst);
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break;
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case Opcode::S_NAND_B64:
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translator.S_AND_B64(true, inst);
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break;
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@ -627,6 +639,9 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::S_AND_B32:
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translator.S_AND_B32(inst);
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break;
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case Opcode::S_OR_B32:
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translator.S_OR_B32(inst);
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break;
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case Opcode::S_LSHR_B32:
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translator.S_LSHR_B32(inst);
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break;
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@ -657,9 +672,21 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::S_BFM_B32:
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translator.S_BFM_B32(inst);
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break;
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case Opcode::V_MIN_U32:
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translator.V_MIN_U32(inst);
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break;
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case Opcode::V_CMP_NE_U64:
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translator.V_CMP_NE_U64(inst);
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break;
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case Opcode::V_TRUNC_F32:
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translator.V_TRUNC_F32(inst);
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break;
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case Opcode::V_CEIL_F32:
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translator.V_CEIL_F32(inst);
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break;
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case Opcode::S_TTRACEDATA:
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LOG_WARNING(Render_Vulkan, "S_TTRACEDATA instruction!");
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break;
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case Opcode::S_NOP:
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case Opcode::S_CBRANCH_EXECZ:
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case Opcode::S_CBRANCH_SCC0:
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