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amdgpu: wait_reg_mem
and write_data
implementation
Command list parsing is temporary moved to async task
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parent
bfb18135fb
commit
8e0c67f12e
5 changed files with 103 additions and 11 deletions
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@ -117,6 +117,14 @@ void Liverpool::ProcessCmdList(u32* cmdbuf, u32 size_in_bytes) {
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}
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case PM4ItOpcode::WriteData: {
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const auto* write_data = reinterpret_cast<PM4CmdWriteData*>(header);
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ASSERT(write_data->dst_sel.Value() == 2 || write_data->dst_sel.Value() == 5);
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const u32 data_size = (header->type3.count.Value() - 2) * 4;
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if (!write_data->wr_one_addr.Value()) {
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std::memcpy(reinterpret_cast<void*>(write_data->Address()), write_data->data,
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data_size);
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} else {
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UNREACHABLE();
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}
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break;
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}
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case PM4ItOpcode::AcquireMem: {
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@ -125,6 +133,13 @@ void Liverpool::ProcessCmdList(u32* cmdbuf, u32 size_in_bytes) {
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}
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case PM4ItOpcode::WaitRegMem: {
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const auto* wait_reg_mem = reinterpret_cast<PM4CmdWaitRegMem*>(header);
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ASSERT(wait_reg_mem->engine.Value() == PM4CmdWaitRegMem::Engine::Me);
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ASSERT(wait_reg_mem->function.Value() == PM4CmdWaitRegMem::Function::Equal);
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{
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std::unique_lock lock{m_reg_mem};
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cv_reg_mem.wait(lock, [&]() { return wait_reg_mem->Test(); });
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}
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break;
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}
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default:
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