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shader_recompiler: Implement linear interpolation support (#3055)
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This commit is contained in:
parent
5004e41100
commit
8ffcfc87bd
14 changed files with 425 additions and 375 deletions
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@ -307,7 +307,9 @@ void EmitContext::DefineInterpolatedAttribs() {
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const Id p2{OpCompositeExtract(F32[4], p_array, 2U)};
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const Id p10{OpFSub(F32[4], p1, p0)};
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const Id p20{OpFSub(F32[4], p2, p0)};
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const Id bary_coord{OpLoad(F32[3], gl_bary_coord_id)};
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const Id bary_coord{OpLoad(F32[3], IsLinear(info.interp_qualifiers[i])
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? bary_coord_linear_id
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: bary_coord_persp_id)};
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const Id bary_coord_y{OpCompositeExtract(F32[1], bary_coord, 1)};
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const Id bary_coord_z{OpCompositeExtract(F32[1], bary_coord, 2)};
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const Id p10_y{OpVectorTimesScalar(F32[4], p10, bary_coord_y)};
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@ -411,8 +413,14 @@ void EmitContext::DefineInputs() {
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DefineVariable(U1[1], spv::BuiltIn::FrontFacing, spv::StorageClass::Input);
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}
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if (profile.needs_manual_interpolation) {
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gl_bary_coord_id =
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DefineVariable(F32[3], spv::BuiltIn::BaryCoordKHR, spv::StorageClass::Input);
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if (info.has_perspective_interp) {
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bary_coord_persp_id =
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DefineVariable(F32[3], spv::BuiltIn::BaryCoordKHR, spv::StorageClass::Input);
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}
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if (info.has_linear_interp) {
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bary_coord_linear_id = DefineVariable(F32[3], spv::BuiltIn::BaryCoordNoPerspKHR,
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spv::StorageClass::Input);
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}
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}
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for (s32 i = 0; i < runtime_info.fs_info.num_inputs; i++) {
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const auto& input = runtime_info.fs_info.inputs[i];
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@ -435,9 +443,12 @@ void EmitContext::DefineInputs() {
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} else {
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attr_id = DefineInput(type, semantic);
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Name(attr_id, fmt::format("fs_in_attr{}", semantic));
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}
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if (input.is_flat) {
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Decorate(attr_id, spv::Decoration::Flat);
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if (input.is_flat) {
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Decorate(attr_id, spv::Decoration::Flat);
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} else if (IsLinear(info.interp_qualifiers[i])) {
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Decorate(attr_id, spv::Decoration::NoPerspective);
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}
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}
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input_params[semantic] =
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GetAttributeInfo(AmdGpu::NumberFormat::Float, attr_id, num_components, false);
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@ -293,8 +293,8 @@ public:
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Id shared_memory_u32_type{};
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Id interpolate_func{};
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Id gl_bary_coord_id{};
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Id bary_coord_persp_id{};
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Id bary_coord_linear_id{};
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struct TextureDefinition {
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const VectorIds* data_types;
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@ -605,11 +605,12 @@ public:
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Info& info_, const RuntimeInfo& runtime_info_, const Profile& profile_)
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: stmt_pool{stmt_pool_}, inst_pool{inst_pool_}, block_pool{block_pool_},
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syntax_list{syntax_list_}, inst_list{inst_list_}, info{info_},
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runtime_info{runtime_info_}, profile{profile_} {
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runtime_info{runtime_info_}, profile{profile_},
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translator{info_, runtime_info_, profile_} {
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Visit(root_stmt, nullptr, nullptr);
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IR::Block& first_block{*syntax_list.front().data.block};
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Translator{&first_block, info, runtime_info, profile}.EmitPrologue();
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IR::Block* first_block = syntax_list.front().data.block;
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translator.EmitPrologue(first_block);
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}
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private:
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@ -637,8 +638,8 @@ private:
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current_block->has_multiple_predecessors = stmt.block->num_predecessors > 1;
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const u32 start = stmt.block->begin_index;
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const u32 size = stmt.block->end_index - start + 1;
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Translate(current_block, stmt.block->begin, inst_list.subspan(start, size),
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info, runtime_info, profile);
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translator.Translate(current_block, stmt.block->begin,
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inst_list.subspan(start, size));
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}
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break;
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}
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@ -820,6 +821,7 @@ private:
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Info& info;
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const RuntimeInfo& runtime_info;
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const Profile& profile;
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Translator translator;
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};
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} // Anonymous namespace
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@ -21,16 +21,60 @@
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namespace Shader::Gcn {
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static u32 next_vgpr_num;
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static std::unordered_map<u32, IR::VectorReg> vgpr_map;
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Translator::Translator(IR::Block* block_, Info& info_, const RuntimeInfo& runtime_info_,
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const Profile& profile_)
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: ir{*block_, block_->begin()}, info{info_}, runtime_info{runtime_info_}, profile{profile_} {
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next_vgpr_num = vgpr_map.empty() ? runtime_info.num_allocated_vgprs : next_vgpr_num;
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Translator::Translator(Info& info_, const RuntimeInfo& runtime_info_, const Profile& profile_)
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: info{info_}, runtime_info{runtime_info_}, profile{profile_},
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next_vgpr_num{runtime_info.num_allocated_vgprs} {
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if (info.l_stage == LogicalStage::Fragment) {
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dst_frag_vreg = GatherInterpQualifiers();
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}
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}
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void Translator::EmitPrologue() {
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IR::VectorReg Translator::GatherInterpQualifiers() {
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u32 dst_vreg{};
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if (runtime_info.fs_info.addr_flags.persp_sample_ena) {
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::PerspectiveSample; // I
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::PerspectiveSample; // J
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info.has_perspective_interp = true;
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}
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if (runtime_info.fs_info.addr_flags.persp_center_ena) {
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::PerspectiveCenter; // I
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::PerspectiveCenter; // J
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info.has_perspective_interp = true;
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}
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if (runtime_info.fs_info.addr_flags.persp_centroid_ena) {
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::PerspectiveCentroid; // I
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::PerspectiveCentroid; // J
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info.has_perspective_interp = true;
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}
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if (runtime_info.fs_info.addr_flags.persp_pull_model_ena) {
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++dst_vreg; // I/W
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++dst_vreg; // J/W
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++dst_vreg; // 1/W
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}
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if (runtime_info.fs_info.addr_flags.linear_sample_ena) {
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::LinearSample; // I
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::LinearSample; // J
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info.has_linear_interp = true;
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}
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if (runtime_info.fs_info.addr_flags.linear_center_ena) {
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::LinearCenter; // I
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::LinearCenter; // J
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info.has_linear_interp = true;
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}
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if (runtime_info.fs_info.addr_flags.linear_centroid_ena) {
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::LinearCentroid; // I
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vgpr_to_interp[dst_vreg++] = IR::Interpolation::LinearCentroid; // J
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info.has_linear_interp = true;
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}
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if (runtime_info.fs_info.addr_flags.line_stipple_tex_ena) {
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++dst_vreg;
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}
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return IR::VectorReg(dst_vreg);
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}
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void Translator::EmitPrologue(IR::Block* first_block) {
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ir = IR::IREmitter(*first_block, first_block->begin());
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ir.Prologue();
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ir.SetExec(ir.Imm1(true));
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@ -60,39 +104,7 @@ void Translator::EmitPrologue() {
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}
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break;
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case LogicalStage::Fragment:
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dst_vreg = IR::VectorReg::V0;
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if (runtime_info.fs_info.addr_flags.persp_sample_ena) {
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++dst_vreg; // I
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++dst_vreg; // J
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}
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if (runtime_info.fs_info.addr_flags.persp_center_ena) {
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++dst_vreg; // I
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++dst_vreg; // J
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}
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if (runtime_info.fs_info.addr_flags.persp_centroid_ena) {
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++dst_vreg; // I
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++dst_vreg; // J
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}
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if (runtime_info.fs_info.addr_flags.persp_pull_model_ena) {
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++dst_vreg; // I/W
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++dst_vreg; // J/W
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++dst_vreg; // 1/W
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}
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if (runtime_info.fs_info.addr_flags.linear_sample_ena) {
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++dst_vreg; // I
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++dst_vreg; // J
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}
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if (runtime_info.fs_info.addr_flags.linear_center_ena) {
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++dst_vreg; // I
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++dst_vreg; // J
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}
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if (runtime_info.fs_info.addr_flags.linear_centroid_ena) {
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++dst_vreg; // I
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++dst_vreg; // J
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}
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if (runtime_info.fs_info.addr_flags.line_stipple_tex_ena) {
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++dst_vreg;
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}
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dst_vreg = dst_frag_vreg;
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if (runtime_info.fs_info.addr_flags.pos_x_float_ena) {
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if (runtime_info.fs_info.en_flags.pos_x_float_ena) {
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ir.SetVectorReg(dst_vreg++, ir.GetAttribute(IR::Attribute::FragCoord, 0));
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@ -543,6 +555,26 @@ void Translator::LogMissingOpcode(const GcnInst& inst) {
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info.translation_failed = true;
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}
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void Translator::Translate(IR::Block* block, u32 pc, std::span<const GcnInst> inst_list) {
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if (inst_list.empty()) {
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return;
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}
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ir = IR::IREmitter{*block, block->begin()};
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for (const auto& inst : inst_list) {
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pc += inst.length;
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// Special case for emitting fetch shader.
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if (inst.opcode == Opcode::S_SWAPPC_B64) {
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ASSERT(info.stage == Stage::Vertex || info.stage == Stage::Export ||
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info.stage == Stage::Local);
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EmitFetch(inst);
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continue;
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}
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TranslateInstruction(inst, pc);
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}
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}
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void Translator::TranslateInstruction(const GcnInst& inst, const u32 pc) {
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// Emit instructions for each category.
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switch (inst.category) {
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@ -577,25 +609,4 @@ void Translator::TranslateInstruction(const GcnInst& inst, const u32 pc) {
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}
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}
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void Translate(IR::Block* block, u32 pc, std::span<const GcnInst> inst_list, Info& info,
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const RuntimeInfo& runtime_info, const Profile& profile) {
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if (inst_list.empty()) {
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return;
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}
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Translator translator{block, info, runtime_info, profile};
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for (const auto& inst : inst_list) {
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pc += inst.length;
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// Special case for emitting fetch shader.
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if (inst.opcode == Opcode::S_SWAPPC_B64) {
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ASSERT(info.stage == Stage::Vertex || info.stage == Stage::Export ||
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info.stage == Stage::Local);
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translator.EmitFetch(inst);
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continue;
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}
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translator.TranslateInstruction(inst, pc);
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}
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}
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} // namespace Shader::Gcn
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@ -53,15 +53,17 @@ enum class NegateMode : u32 {
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Result,
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};
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static constexpr size_t MaxInterpVgpr = 16;
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class Translator {
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public:
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explicit Translator(IR::Block* block_, Info& info, const RuntimeInfo& runtime_info,
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const Profile& profile);
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explicit Translator(Info& info, const RuntimeInfo& runtime_info, const Profile& profile);
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void Translate(IR::Block* block, u32 pc, std::span<const GcnInst> inst_list);
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void TranslateInstruction(const GcnInst& inst, u32 pc);
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// Instruction categories
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void EmitPrologue();
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void EmitPrologue(IR::Block* first_block);
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void EmitFetch(const GcnInst& inst);
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void EmitExport(const GcnInst& inst);
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void EmitFlowControl(u32 pc, const GcnInst& inst);
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@ -326,16 +328,18 @@ private:
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void LogMissingOpcode(const GcnInst& inst);
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IR::VectorReg GetScratchVgpr(u32 offset);
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IR::VectorReg GatherInterpQualifiers();
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private:
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IR::IREmitter ir;
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Info& info;
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const RuntimeInfo& runtime_info;
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const Profile& profile;
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u32 next_vgpr_num;
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std::unordered_map<u32, IR::VectorReg> vgpr_map;
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std::array<IR::Interpolation, MaxInterpVgpr> vgpr_to_interp{};
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IR::VectorReg dst_frag_vreg{};
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bool opcode_missing = false;
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};
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void Translate(IR::Block* block, u32 block_base, std::span<const GcnInst> inst_list, Info& info,
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const RuntimeInfo& runtime_info, const Profile& profile);
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} // namespace Shader::Gcn
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@ -22,13 +22,14 @@ void Translator::EmitVectorInterpolation(const GcnInst& inst) {
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// VINTRP
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void Translator::V_INTERP_P2_F32(const GcnInst& inst) {
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auto& attr = runtime_info.fs_info.inputs.at(inst.control.vintrp.attr);
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const auto& attr = runtime_info.fs_info.inputs.at(inst.control.vintrp.attr);
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info.interp_qualifiers[attr.param_index] = vgpr_to_interp[inst.src[0].code];
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const IR::Attribute attrib{IR::Attribute::Param0 + attr.param_index};
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SetDst(inst.dst[0], ir.GetAttribute(attrib, inst.control.vintrp.chan));
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}
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void Translator::V_INTERP_MOV_F32(const GcnInst& inst) {
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auto& attr = runtime_info.fs_info.inputs.at(inst.control.vintrp.attr);
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const auto& attr = runtime_info.fs_info.inputs.at(inst.control.vintrp.attr);
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const IR::Attribute attrib{IR::Attribute::Param0 + attr.param_index};
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SetDst(inst.dst[0], ir.GetAttribute(attrib, inst.control.vintrp.chan));
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}
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@ -193,6 +193,8 @@ struct Info {
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PersistentSrtInfo srt_info;
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std::vector<u32> flattened_ud_buf;
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std::array<IR::Interpolation, 32> interp_qualifiers{};
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IR::ScalarReg tess_consts_ptr_base = IR::ScalarReg::Max;
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s32 tess_consts_dword_offset = -1;
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@ -206,6 +208,8 @@ struct Info {
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bool has_discard{};
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bool has_image_gather{};
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bool has_image_query{};
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bool has_perspective_interp{};
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bool has_linear_interp{};
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bool uses_atomic_float_min_max{};
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bool uses_lane_id{};
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bool uses_group_quad{};
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@ -83,6 +83,16 @@ enum class Attribute : u64 {
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Max,
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};
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enum class Interpolation {
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Invalid = 0,
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PerspectiveSample = 1,
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PerspectiveCenter = 2,
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PerspectiveCentroid = 3,
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LinearSample = 4,
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LinearCenter = 5,
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LinearCentroid = 6,
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};
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constexpr size_t NumAttributes = static_cast<size_t>(Attribute::Max);
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constexpr size_t NumRenderTargets = 8;
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constexpr size_t NumParams = 32;
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@ -104,6 +114,15 @@ constexpr bool IsMrt(Attribute attribute) noexcept {
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return attribute >= Attribute::RenderTarget0 && attribute <= Attribute::RenderTarget7;
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}
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constexpr bool IsLinear(Interpolation interp) noexcept {
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return interp >= Interpolation::LinearSample && interp <= Interpolation::LinearCentroid;
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}
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constexpr bool IsPerspective(Interpolation interp) noexcept {
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return interp >= Interpolation::PerspectiveSample &&
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interp <= Interpolation::PerspectiveCentroid;
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}
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[[nodiscard]] std::string NameOf(Attribute attribute);
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[[nodiscard]] constexpr Attribute operator+(Attribute attr, int num) {
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@ -2,7 +2,6 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <array>
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#include <bit>
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#include <source_location>
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#include <boost/container/small_vector.hpp>
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#include "common/assert.h"
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@ -6,7 +6,6 @@
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#include <cstring>
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#include <type_traits>
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#include "shader_recompiler/info.h"
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#include "shader_recompiler/ir/attribute.h"
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#include "shader_recompiler/ir/basic_block.h"
|
||||
#include "shader_recompiler/ir/condition.h"
|
||||
|
@ -17,6 +16,7 @@ namespace Shader::IR {
|
|||
|
||||
class IREmitter {
|
||||
public:
|
||||
explicit IREmitter() = default;
|
||||
explicit IREmitter(Block& block_) : block{&block_}, insertion_point{block->end()} {}
|
||||
explicit IREmitter(Block& block_, Block::iterator insertion_point_)
|
||||
: block{&block_}, insertion_point{insertion_point_} {}
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
#include "common/bit_field.h"
|
||||
#include "common/enum.h"
|
||||
#include "common/types.h"
|
||||
#include "video_core/amdgpu/types.h"
|
||||
#include "video_core/amdgpu/pixel_format.h"
|
||||
|
||||
namespace Shader::IR {
|
||||
|
||||
|
|
|
@ -5,34 +5,310 @@
|
|||
|
||||
#include <string_view>
|
||||
#include <fmt/format.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/types.h"
|
||||
#include "video_core/amdgpu/types.h"
|
||||
|
||||
namespace AmdGpu {
|
||||
|
||||
enum NumberClass {
|
||||
// Table 8.13 Data and Image Formats [Sea Islands Series Instruction Set Architecture]
|
||||
enum class DataFormat : u32 {
|
||||
FormatInvalid = 0,
|
||||
Format8 = 1,
|
||||
Format16 = 2,
|
||||
Format8_8 = 3,
|
||||
Format32 = 4,
|
||||
Format16_16 = 5,
|
||||
Format10_11_11 = 6,
|
||||
Format11_11_10 = 7,
|
||||
Format10_10_10_2 = 8,
|
||||
Format2_10_10_10 = 9,
|
||||
Format8_8_8_8 = 10,
|
||||
Format32_32 = 11,
|
||||
Format16_16_16_16 = 12,
|
||||
Format32_32_32 = 13,
|
||||
Format32_32_32_32 = 14,
|
||||
Format5_6_5 = 16,
|
||||
Format1_5_5_5 = 17,
|
||||
Format5_5_5_1 = 18,
|
||||
Format4_4_4_4 = 19,
|
||||
Format8_24 = 20,
|
||||
Format24_8 = 21,
|
||||
FormatX24_8_32 = 22,
|
||||
FormatGB_GR = 32,
|
||||
FormatBG_RG = 33,
|
||||
Format5_9_9_9 = 34,
|
||||
FormatBc1 = 35,
|
||||
FormatBc2 = 36,
|
||||
FormatBc3 = 37,
|
||||
FormatBc4 = 38,
|
||||
FormatBc5 = 39,
|
||||
FormatBc6 = 40,
|
||||
FormatBc7 = 41,
|
||||
FormatFmask8_1 = 47,
|
||||
FormatFmask8_2 = 48,
|
||||
FormatFmask8_4 = 49,
|
||||
FormatFmask16_1 = 50,
|
||||
FormatFmask16_2 = 51,
|
||||
FormatFmask32_2 = 52,
|
||||
FormatFmask32_4 = 53,
|
||||
FormatFmask32_8 = 54,
|
||||
FormatFmask64_4 = 55,
|
||||
FormatFmask64_8 = 56,
|
||||
Format4_4 = 57,
|
||||
Format6_5_5 = 58,
|
||||
Format1 = 59,
|
||||
Format1_Reversed = 60,
|
||||
Format32_As_8 = 61,
|
||||
Format32_As_8_8 = 62,
|
||||
Format32_As_32_32_32_32 = 63,
|
||||
};
|
||||
|
||||
enum class NumberFormat : u32 {
|
||||
Unorm = 0,
|
||||
Snorm = 1,
|
||||
Uscaled = 2,
|
||||
Sscaled = 3,
|
||||
Uint = 4,
|
||||
Sint = 5,
|
||||
SnormNz = 6,
|
||||
Float = 7,
|
||||
Srgb = 9,
|
||||
Ubnorm = 10,
|
||||
UbnormNz = 11,
|
||||
Ubint = 12,
|
||||
Ubscaled = 13,
|
||||
};
|
||||
|
||||
enum class NumberClass {
|
||||
Float,
|
||||
Sint,
|
||||
Uint,
|
||||
};
|
||||
|
||||
[[nodiscard]] constexpr NumberClass GetNumberClass(const NumberFormat nfmt) {
|
||||
switch (nfmt) {
|
||||
case NumberFormat::Sint:
|
||||
return Sint;
|
||||
case NumberFormat::Uint:
|
||||
return Uint;
|
||||
enum class CompSwizzle : u8 {
|
||||
Zero = 0,
|
||||
One = 1,
|
||||
Red = 4,
|
||||
Green = 5,
|
||||
Blue = 6,
|
||||
Alpha = 7,
|
||||
};
|
||||
|
||||
enum class NumberConversion : u32 {
|
||||
None = 0,
|
||||
UintToUscaled = 1,
|
||||
SintToSscaled = 2,
|
||||
UnormToUbnorm = 3,
|
||||
Sint8ToSnormNz = 4,
|
||||
Sint16ToSnormNz = 5,
|
||||
Uint32ToUnorm = 6,
|
||||
};
|
||||
|
||||
struct CompMapping {
|
||||
CompSwizzle r;
|
||||
CompSwizzle g;
|
||||
CompSwizzle b;
|
||||
CompSwizzle a;
|
||||
|
||||
auto operator<=>(const CompMapping& other) const = default;
|
||||
|
||||
template <typename T>
|
||||
[[nodiscard]] std::array<T, 4> Apply(const std::array<T, 4>& data) const {
|
||||
return {
|
||||
ApplySingle(data, r),
|
||||
ApplySingle(data, g),
|
||||
ApplySingle(data, b),
|
||||
ApplySingle(data, a),
|
||||
};
|
||||
}
|
||||
|
||||
[[nodiscard]] CompMapping Inverse() const {
|
||||
CompMapping result{};
|
||||
InverseSingle(result.r, CompSwizzle::Red);
|
||||
InverseSingle(result.g, CompSwizzle::Green);
|
||||
InverseSingle(result.b, CompSwizzle::Blue);
|
||||
InverseSingle(result.a, CompSwizzle::Alpha);
|
||||
return result;
|
||||
}
|
||||
|
||||
private:
|
||||
template <typename T>
|
||||
T ApplySingle(const std::array<T, 4>& data, const CompSwizzle swizzle) const {
|
||||
switch (swizzle) {
|
||||
case CompSwizzle::Zero:
|
||||
return T(0);
|
||||
case CompSwizzle::One:
|
||||
return T(1);
|
||||
case CompSwizzle::Red:
|
||||
return data[0];
|
||||
case CompSwizzle::Green:
|
||||
return data[1];
|
||||
case CompSwizzle::Blue:
|
||||
return data[2];
|
||||
case CompSwizzle::Alpha:
|
||||
return data[3];
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
void InverseSingle(CompSwizzle& dst, const CompSwizzle target) const {
|
||||
if (r == target) {
|
||||
dst = CompSwizzle::Red;
|
||||
} else if (g == target) {
|
||||
dst = CompSwizzle::Green;
|
||||
} else if (b == target) {
|
||||
dst = CompSwizzle::Blue;
|
||||
} else if (a == target) {
|
||||
dst = CompSwizzle::Alpha;
|
||||
} else {
|
||||
dst = CompSwizzle::Zero;
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
static constexpr CompMapping IdentityMapping = {
|
||||
.r = CompSwizzle::Red,
|
||||
.g = CompSwizzle::Green,
|
||||
.b = CompSwizzle::Blue,
|
||||
.a = CompSwizzle::Alpha,
|
||||
};
|
||||
|
||||
constexpr DataFormat RemapDataFormat(const DataFormat format) {
|
||||
switch (format) {
|
||||
case DataFormat::Format11_11_10:
|
||||
return DataFormat::Format10_11_11;
|
||||
case DataFormat::Format10_10_10_2:
|
||||
return DataFormat::Format2_10_10_10;
|
||||
case DataFormat::Format5_5_5_1:
|
||||
return DataFormat::Format1_5_5_5;
|
||||
default:
|
||||
return Float;
|
||||
return format;
|
||||
}
|
||||
}
|
||||
|
||||
[[nodiscard]] constexpr bool IsInteger(const NumberFormat nfmt) {
|
||||
constexpr NumberFormat RemapNumberFormat(const NumberFormat format, const DataFormat data_format) {
|
||||
switch (format) {
|
||||
case NumberFormat::Unorm: {
|
||||
switch (data_format) {
|
||||
case DataFormat::Format32:
|
||||
case DataFormat::Format32_32:
|
||||
case DataFormat::Format32_32_32:
|
||||
case DataFormat::Format32_32_32_32:
|
||||
return NumberFormat::Uint;
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
case NumberFormat::Uscaled:
|
||||
return NumberFormat::Uint;
|
||||
case NumberFormat::Sscaled:
|
||||
case NumberFormat::SnormNz:
|
||||
return NumberFormat::Sint;
|
||||
case NumberFormat::Ubnorm:
|
||||
return NumberFormat::Unorm;
|
||||
case NumberFormat::Float:
|
||||
if (data_format == DataFormat::Format8) {
|
||||
// Games may ask for 8-bit float when they want to access the stencil component
|
||||
// of a depth-stencil image. Change to unsigned int to match the stencil format.
|
||||
// This is also the closest approximation to pass the bits through unconverted.
|
||||
return NumberFormat::Uint;
|
||||
}
|
||||
[[fallthrough]];
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
|
||||
constexpr CompMapping RemapSwizzle(const DataFormat format, const CompMapping swizzle) {
|
||||
switch (format) {
|
||||
case DataFormat::Format1_5_5_5:
|
||||
case DataFormat::Format11_11_10: {
|
||||
CompMapping result;
|
||||
result.r = swizzle.b;
|
||||
result.g = swizzle.g;
|
||||
result.b = swizzle.r;
|
||||
result.a = swizzle.a;
|
||||
return result;
|
||||
}
|
||||
case DataFormat::Format10_10_10_2: {
|
||||
CompMapping result;
|
||||
result.r = swizzle.a;
|
||||
result.g = swizzle.b;
|
||||
result.b = swizzle.g;
|
||||
result.a = swizzle.r;
|
||||
return result;
|
||||
}
|
||||
case DataFormat::Format4_4_4_4: {
|
||||
// Remap to a more supported component order.
|
||||
CompMapping result;
|
||||
result.r = swizzle.g;
|
||||
result.g = swizzle.b;
|
||||
result.b = swizzle.a;
|
||||
result.a = swizzle.r;
|
||||
return result;
|
||||
}
|
||||
default:
|
||||
return swizzle;
|
||||
}
|
||||
}
|
||||
|
||||
constexpr NumberConversion MapNumberConversion(const NumberFormat num_fmt,
|
||||
const DataFormat data_fmt) {
|
||||
switch (num_fmt) {
|
||||
case NumberFormat::Unorm: {
|
||||
switch (data_fmt) {
|
||||
case DataFormat::Format32:
|
||||
case DataFormat::Format32_32:
|
||||
case DataFormat::Format32_32_32:
|
||||
case DataFormat::Format32_32_32_32:
|
||||
return NumberConversion::Uint32ToUnorm;
|
||||
default:
|
||||
return NumberConversion::None;
|
||||
}
|
||||
}
|
||||
case NumberFormat::Uscaled:
|
||||
return NumberConversion::UintToUscaled;
|
||||
case NumberFormat::Sscaled:
|
||||
return NumberConversion::SintToSscaled;
|
||||
case NumberFormat::Ubnorm:
|
||||
return NumberConversion::UnormToUbnorm;
|
||||
case NumberFormat::SnormNz: {
|
||||
switch (data_fmt) {
|
||||
case DataFormat::Format8:
|
||||
case DataFormat::Format8_8:
|
||||
case DataFormat::Format8_8_8_8:
|
||||
return NumberConversion::Sint8ToSnormNz;
|
||||
case DataFormat::Format16:
|
||||
case DataFormat::Format16_16:
|
||||
case DataFormat::Format16_16_16_16:
|
||||
return NumberConversion::Sint16ToSnormNz;
|
||||
default:
|
||||
UNREACHABLE_MSG("data_fmt = {}", u32(data_fmt));
|
||||
}
|
||||
}
|
||||
default:
|
||||
return NumberConversion::None;
|
||||
}
|
||||
}
|
||||
|
||||
constexpr NumberClass GetNumberClass(const NumberFormat nfmt) {
|
||||
switch (nfmt) {
|
||||
case NumberFormat::Sint:
|
||||
return NumberClass::Sint;
|
||||
case NumberFormat::Uint:
|
||||
return NumberClass::Uint;
|
||||
default:
|
||||
return NumberClass::Float;
|
||||
}
|
||||
}
|
||||
|
||||
constexpr bool IsInteger(const NumberFormat nfmt) {
|
||||
return nfmt == AmdGpu::NumberFormat::Sint || nfmt == AmdGpu::NumberFormat::Uint;
|
||||
}
|
||||
|
||||
[[nodiscard]] std::string_view NameOf(DataFormat fmt);
|
||||
[[nodiscard]] std::string_view NameOf(NumberFormat fmt);
|
||||
std::string_view NameOf(DataFormat fmt);
|
||||
std::string_view NameOf(NumberFormat fmt);
|
||||
|
||||
int NumComponents(DataFormat format);
|
||||
int NumBits(DataFormat format);
|
||||
|
|
|
@ -6,7 +6,6 @@
|
|||
#include "common/alignment.h"
|
||||
#include "common/assert.h"
|
||||
#include "common/bit_field.h"
|
||||
#include "common/types.h"
|
||||
#include "video_core/amdgpu/pixel_format.h"
|
||||
|
||||
namespace AmdGpu {
|
||||
|
|
|
@ -5,7 +5,6 @@
|
|||
|
||||
#include <string_view>
|
||||
#include <fmt/format.h>
|
||||
#include "common/assert.h"
|
||||
#include "common/types.h"
|
||||
|
||||
namespace AmdGpu {
|
||||
|
@ -114,281 +113,6 @@ enum class GsOutputPrimitiveType : u32 {
|
|||
TriangleStrip = 2,
|
||||
};
|
||||
|
||||
// Table 8.13 Data and Image Formats [Sea Islands Series Instruction Set Architecture]
|
||||
enum class DataFormat : u32 {
|
||||
FormatInvalid = 0,
|
||||
Format8 = 1,
|
||||
Format16 = 2,
|
||||
Format8_8 = 3,
|
||||
Format32 = 4,
|
||||
Format16_16 = 5,
|
||||
Format10_11_11 = 6,
|
||||
Format11_11_10 = 7,
|
||||
Format10_10_10_2 = 8,
|
||||
Format2_10_10_10 = 9,
|
||||
Format8_8_8_8 = 10,
|
||||
Format32_32 = 11,
|
||||
Format16_16_16_16 = 12,
|
||||
Format32_32_32 = 13,
|
||||
Format32_32_32_32 = 14,
|
||||
Format5_6_5 = 16,
|
||||
Format1_5_5_5 = 17,
|
||||
Format5_5_5_1 = 18,
|
||||
Format4_4_4_4 = 19,
|
||||
Format8_24 = 20,
|
||||
Format24_8 = 21,
|
||||
FormatX24_8_32 = 22,
|
||||
FormatGB_GR = 32,
|
||||
FormatBG_RG = 33,
|
||||
Format5_9_9_9 = 34,
|
||||
FormatBc1 = 35,
|
||||
FormatBc2 = 36,
|
||||
FormatBc3 = 37,
|
||||
FormatBc4 = 38,
|
||||
FormatBc5 = 39,
|
||||
FormatBc6 = 40,
|
||||
FormatBc7 = 41,
|
||||
FormatFmask8_1 = 47,
|
||||
FormatFmask8_2 = 48,
|
||||
FormatFmask8_4 = 49,
|
||||
FormatFmask16_1 = 50,
|
||||
FormatFmask16_2 = 51,
|
||||
FormatFmask32_2 = 52,
|
||||
FormatFmask32_4 = 53,
|
||||
FormatFmask32_8 = 54,
|
||||
FormatFmask64_4 = 55,
|
||||
FormatFmask64_8 = 56,
|
||||
Format4_4 = 57,
|
||||
Format6_5_5 = 58,
|
||||
Format1 = 59,
|
||||
Format1_Reversed = 60,
|
||||
Format32_As_8 = 61,
|
||||
Format32_As_8_8 = 62,
|
||||
Format32_As_32_32_32_32 = 63,
|
||||
};
|
||||
|
||||
enum class NumberFormat : u32 {
|
||||
Unorm = 0,
|
||||
Snorm = 1,
|
||||
Uscaled = 2,
|
||||
Sscaled = 3,
|
||||
Uint = 4,
|
||||
Sint = 5,
|
||||
SnormNz = 6,
|
||||
Float = 7,
|
||||
Srgb = 9,
|
||||
Ubnorm = 10,
|
||||
UbnormNz = 11,
|
||||
Ubint = 12,
|
||||
Ubscaled = 13,
|
||||
};
|
||||
|
||||
enum class CompSwizzle : u8 {
|
||||
Zero = 0,
|
||||
One = 1,
|
||||
Red = 4,
|
||||
Green = 5,
|
||||
Blue = 6,
|
||||
Alpha = 7,
|
||||
};
|
||||
|
||||
enum class NumberConversion : u32 {
|
||||
None = 0,
|
||||
UintToUscaled = 1,
|
||||
SintToSscaled = 2,
|
||||
UnormToUbnorm = 3,
|
||||
Sint8ToSnormNz = 4,
|
||||
Sint16ToSnormNz = 5,
|
||||
Uint32ToUnorm = 6,
|
||||
};
|
||||
|
||||
struct CompMapping {
|
||||
CompSwizzle r;
|
||||
CompSwizzle g;
|
||||
CompSwizzle b;
|
||||
CompSwizzle a;
|
||||
|
||||
auto operator<=>(const CompMapping& other) const = default;
|
||||
|
||||
template <typename T>
|
||||
[[nodiscard]] std::array<T, 4> Apply(const std::array<T, 4>& data) const {
|
||||
return {
|
||||
ApplySingle(data, r),
|
||||
ApplySingle(data, g),
|
||||
ApplySingle(data, b),
|
||||
ApplySingle(data, a),
|
||||
};
|
||||
}
|
||||
|
||||
[[nodiscard]] CompMapping Inverse() const {
|
||||
CompMapping result{};
|
||||
InverseSingle(result.r, CompSwizzle::Red);
|
||||
InverseSingle(result.g, CompSwizzle::Green);
|
||||
InverseSingle(result.b, CompSwizzle::Blue);
|
||||
InverseSingle(result.a, CompSwizzle::Alpha);
|
||||
return result;
|
||||
}
|
||||
|
||||
private:
|
||||
template <typename T>
|
||||
T ApplySingle(const std::array<T, 4>& data, const CompSwizzle swizzle) const {
|
||||
switch (swizzle) {
|
||||
case CompSwizzle::Zero:
|
||||
return T(0);
|
||||
case CompSwizzle::One:
|
||||
return T(1);
|
||||
case CompSwizzle::Red:
|
||||
return data[0];
|
||||
case CompSwizzle::Green:
|
||||
return data[1];
|
||||
case CompSwizzle::Blue:
|
||||
return data[2];
|
||||
case CompSwizzle::Alpha:
|
||||
return data[3];
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
void InverseSingle(CompSwizzle& dst, const CompSwizzle target) const {
|
||||
if (r == target) {
|
||||
dst = CompSwizzle::Red;
|
||||
} else if (g == target) {
|
||||
dst = CompSwizzle::Green;
|
||||
} else if (b == target) {
|
||||
dst = CompSwizzle::Blue;
|
||||
} else if (a == target) {
|
||||
dst = CompSwizzle::Alpha;
|
||||
} else {
|
||||
dst = CompSwizzle::Zero;
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
static constexpr CompMapping IdentityMapping = {
|
||||
.r = CompSwizzle::Red,
|
||||
.g = CompSwizzle::Green,
|
||||
.b = CompSwizzle::Blue,
|
||||
.a = CompSwizzle::Alpha,
|
||||
};
|
||||
|
||||
inline DataFormat RemapDataFormat(const DataFormat format) {
|
||||
switch (format) {
|
||||
case DataFormat::Format11_11_10:
|
||||
return DataFormat::Format10_11_11;
|
||||
case DataFormat::Format10_10_10_2:
|
||||
return DataFormat::Format2_10_10_10;
|
||||
case DataFormat::Format5_5_5_1:
|
||||
return DataFormat::Format1_5_5_5;
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
|
||||
inline NumberFormat RemapNumberFormat(const NumberFormat format, const DataFormat data_format) {
|
||||
switch (format) {
|
||||
case NumberFormat::Unorm: {
|
||||
switch (data_format) {
|
||||
case DataFormat::Format32:
|
||||
case DataFormat::Format32_32:
|
||||
case DataFormat::Format32_32_32:
|
||||
case DataFormat::Format32_32_32_32:
|
||||
return NumberFormat::Uint;
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
case NumberFormat::Uscaled:
|
||||
return NumberFormat::Uint;
|
||||
case NumberFormat::Sscaled:
|
||||
case NumberFormat::SnormNz:
|
||||
return NumberFormat::Sint;
|
||||
case NumberFormat::Ubnorm:
|
||||
return NumberFormat::Unorm;
|
||||
case NumberFormat::Float:
|
||||
if (data_format == DataFormat::Format8) {
|
||||
// Games may ask for 8-bit float when they want to access the stencil component
|
||||
// of a depth-stencil image. Change to unsigned int to match the stencil format.
|
||||
// This is also the closest approximation to pass the bits through unconverted.
|
||||
return NumberFormat::Uint;
|
||||
}
|
||||
[[fallthrough]];
|
||||
default:
|
||||
return format;
|
||||
}
|
||||
}
|
||||
|
||||
inline CompMapping RemapSwizzle(const DataFormat format, const CompMapping swizzle) {
|
||||
switch (format) {
|
||||
case DataFormat::Format1_5_5_5:
|
||||
case DataFormat::Format11_11_10: {
|
||||
CompMapping result;
|
||||
result.r = swizzle.b;
|
||||
result.g = swizzle.g;
|
||||
result.b = swizzle.r;
|
||||
result.a = swizzle.a;
|
||||
return result;
|
||||
}
|
||||
case DataFormat::Format10_10_10_2: {
|
||||
CompMapping result;
|
||||
result.r = swizzle.a;
|
||||
result.g = swizzle.b;
|
||||
result.b = swizzle.g;
|
||||
result.a = swizzle.r;
|
||||
return result;
|
||||
}
|
||||
case DataFormat::Format4_4_4_4: {
|
||||
// Remap to a more supported component order.
|
||||
CompMapping result;
|
||||
result.r = swizzle.g;
|
||||
result.g = swizzle.b;
|
||||
result.b = swizzle.a;
|
||||
result.a = swizzle.r;
|
||||
return result;
|
||||
}
|
||||
default:
|
||||
return swizzle;
|
||||
}
|
||||
}
|
||||
|
||||
inline NumberConversion MapNumberConversion(const NumberFormat num_fmt, const DataFormat data_fmt) {
|
||||
switch (num_fmt) {
|
||||
case NumberFormat::Unorm: {
|
||||
switch (data_fmt) {
|
||||
case DataFormat::Format32:
|
||||
case DataFormat::Format32_32:
|
||||
case DataFormat::Format32_32_32:
|
||||
case DataFormat::Format32_32_32_32:
|
||||
return NumberConversion::Uint32ToUnorm;
|
||||
default:
|
||||
return NumberConversion::None;
|
||||
}
|
||||
}
|
||||
case NumberFormat::Uscaled:
|
||||
return NumberConversion::UintToUscaled;
|
||||
case NumberFormat::Sscaled:
|
||||
return NumberConversion::SintToSscaled;
|
||||
case NumberFormat::Ubnorm:
|
||||
return NumberConversion::UnormToUbnorm;
|
||||
case NumberFormat::SnormNz: {
|
||||
switch (data_fmt) {
|
||||
case DataFormat::Format8:
|
||||
case DataFormat::Format8_8:
|
||||
case DataFormat::Format8_8_8_8:
|
||||
return NumberConversion::Sint8ToSnormNz;
|
||||
case DataFormat::Format16:
|
||||
case DataFormat::Format16_16:
|
||||
case DataFormat::Format16_16_16_16:
|
||||
return NumberConversion::Sint16ToSnormNz;
|
||||
default:
|
||||
UNREACHABLE_MSG("data_fmt = {}", u32(data_fmt));
|
||||
}
|
||||
}
|
||||
default:
|
||||
return NumberConversion::None;
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace AmdGpu
|
||||
|
||||
template <>
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue