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Implement shader resource tables (#1165)
* Implement shader resource tables * fix after rebase + squash * address some review comments * fix pipeline_common * cleanup debug stuff * switch to using single codegenerator
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30 changed files with 740 additions and 119 deletions
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@ -4,6 +4,7 @@
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#include <algorithm>
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#include "common/alignment.h"
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#include "common/scope_exit.h"
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#include "common/types.h"
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#include "shader_recompiler/info.h"
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#include "video_core/amdgpu/liverpool.h"
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#include "video_core/buffer_cache/buffer_cache.h"
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@ -156,7 +157,7 @@ bool BufferCache::BindVertexBuffers(const Shader::Info& vs_info) {
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continue;
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}
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const auto& buffer = vs_info.ReadUd<AmdGpu::Buffer>(input.sgpr_base, input.dword_offset);
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const auto& buffer = vs_info.ReadUdReg<AmdGpu::Buffer>(input.sgpr_base, input.dword_offset);
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if (buffer.GetSize() == 0) {
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continue;
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}
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@ -301,6 +302,14 @@ void BufferCache::InlineData(VAddr address, const void* value, u32 num_bytes, bo
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cmdbuf.updateBuffer(buffer->Handle(), buf_barrier.offset, num_bytes, value);
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}
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std::pair<Buffer*, u32> BufferCache::ObtainHostUBO(std::span<const u32> data) {
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static constexpr u64 StreamThreshold = CACHING_PAGESIZE;
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ASSERT(data.size_bytes() <= StreamThreshold);
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const u64 offset = stream_buffer.Copy(reinterpret_cast<VAddr>(data.data()), data.size_bytes(),
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instance.UniformMinAlignment());
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return {&stream_buffer, offset};
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}
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std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, bool is_written,
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bool is_texel_buffer, BufferId buffer_id) {
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// For small uniform buffers that have not been modified by gpu
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@ -84,6 +84,8 @@ public:
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/// Writes a value to GPU buffer.
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void InlineData(VAddr address, const void* value, u32 num_bytes, bool is_gds);
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[[nodiscard]] std::pair<Buffer*, u32> ObtainHostUBO(std::span<const u32> data);
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/// Obtains a buffer for the specified region.
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[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(VAddr gpu_addr, u32 size, bool is_written,
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bool is_texel_buffer = false,
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